Digital scan converter for ultrasonic scan system using uniform ladder algorithm

Abstract

A digital scan converter for an ultrasonic scan system having a plurality of probes, includes a clock generator for generating sampling clock and image display clock corresponding to a currently used probe, a first-in-first-out (FIFO) memory for storing and outputting the data acquired by the currently used probe according to the sampling clock of the clock generator, a controller for calculating a write address and a read address corresponding to the currently used probe and outputting the calculated write address and the read address alternately, a frame memory for storing the data output from the FIFO memory according to the write address of the controller and outputting the stored data according to the read address of the controller and the image display clock of the clock generator, and an address adjustment portion for adjusting the write address output from the controller and supplying the adjusted write address to the frame memory, so that the data acquired by the currently used probe is stored in storage positions designated by a plurality of line addresses corresponding to a single column address in the frame memory and then in storage positions designated by a plurality of line addresses corresponding to the following column address. Thus, desired digital scan conversion can be performed using only a software processing even when there is a frame rate alteration for displaying the altered number of usable probes on a screen.

Dependencies are inferred from the claim text.