Mappable functions from single chip/multi-chip processors for computers

A distributed system comprising,

• first and second engines respectively, forming first and second integrated systems, said first engine including,
• one or more first engine chips having a plurality of first functional circuits for performing a plurality of first engine functions,
• a plurality of first Input/Output,
• a plurality of internal connectors on said first engine chips for interconnecting the functional circuits to the first Input/Out pins,
• first selection means for selecting,
• in a stand-alone mode for the first integrated system, the connection of a first set of said first functional circuits to a first set of said first Input/Output pins for operation with a first set of said first engine functions, said first set of first engine functions comprising at least one first engine function, and
• in a distributed mode, the connection of a second set of said first functional circuits to a second set of said first Input/Output pins for operation with a second set of said first engine functions, said second set of first engine functions comprising at least one first engine function,
• said second engine including,
• one or more second engine chips having a plurality of second functional circuits for performing a plurality of second engine functions,
• a plurality of second Input/Output pins,
• a plurality of internal connectors on said second engine chips for interconnecting the functional circuits to the second Input/Output pins,
• second selection means for selecting,
• in a stand-alone mode for the second integrated system, the connection of a first set of said second functional circuits to a first set of said second Input/Output pins for operation with a first set of said second engine functions, said first set of second engine functions comprising at least one second engine function, and
• in a distributed mode the connection of a second set of said second functional circuits to a second set of said second Input/Output pins for operation with a second set of said second engine functions, said second set of second engine functions comprising at least one second engine function, and wherein the distributed system further comprises
• control means for controlling the selection means of said engines.

A distributed system for connection to a plurality of bus devices comprising,

• a plurality of engines, each of said engines including
• one or more chips having a plurality of functional circuits for performing a plurality of functions,
• a plurality of Input/Output pins,
• a plurality of internal connectors on said chips for connecting the functional circuits to the Input/Output pins, a plurality of special-purpose buses each operating with bus timing parameters tailored for a corresponding bus device,
• a common bus intermediate the bus devices and the corresponding special-purpose buses, and connected to each of said bus devices,
• connection means for selectively connecting said special-purpose buses to said common bus at different times to impose the appropriate timing parameter onto the common bus, corresponding to the specific timing parameter of the bus device being accessed, and
• selection means for selecting between a stand-alone mode and a distributed mode, wherein
• in a stand-alone mode a first set of said functional circuits are connected to said Input/Output pins for operation with a first set of said functions, said first set of functions comprising at least one function, and wherein
• in a distributed mode a second set of said functional circuits are connected to said Input/Output pins for operation with a second set of said functions, said second set of functions comprising at least one function,
• the distributed system further comprising control means for controlling the selection means of the engines.