Memory subsystem with disk meshing, controller meshing, and efficient cache buffer lookup
AssigneeSouthwestern Bell Technology Resources, Inc.
InventorLarry T. Jost
Life of this patent
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AssigneeSouthwestern Bell Technology Resources, Inc.
InventorLarry T. Jost
Estimating the term…
In a data processing system, source block addresses are linearly mapped to virtual linear target disks equal in size to actual physical disks comprised by the long-term storage. Blocks of the virtual linear target disks are then assigned to disk-meshed disks equal in size to the actual physical disks whereby each block within a set of adjacently addressed linear target disk blocks is assigned to a separate disk-meshed disk. Controller meshing may be performed by assigning each disk-meshed disk to a controller-meshed disk which will comprise the actual physical disk, whereby respective sets of blocks within respective disk-meshed disks, all having the same disk controller, are assigned to equal-sized controller-meshed disks located on different disk controllers. Additional mechanisms that may be provided in the data processing system include efficient cache buffer lookup linked lists, and a mechanism for accelerating processing performed by an ancillary processing mechanism by ignoring a delay time.
A data processing system comprising:
In a data processing system comprising a processor that operates on various data and specifies a source block address that corresponds to a requested data block located within a memory to be accessed by the processor, and a hierarchical memory system comprising a cache and a long-term storage, a storage control method comprising:
Dependencies are inferred from the claim text.