Information processing system and information processing method for executing instructions in parallel

An information processing system for parallel execution of sequentially-ordered instructions, comprising:

• a plurality of execution units, each execution unit executing processing required by an instruction;
• a memory storing a series of instructions;
• an instruction fetch circuit connected to said memory, fetching instructions from said memory;
• an instruction decoding circuit connected to said instruction fetch circuit decoding the instructions fetched by said instruction fetch circuit;
• a set-up circuit, connected to said instruction decoding circuit and said plurality of execution units, setting-up decoded instructions into the execution units in such a manner that a group of decoded instructions to be executed next are set-up simultaneously into different ones of said plurality of execution units, each of which is capable of executing processing required by one of the instructions of the group of decoded instructions, in response to completion of execution, by different ones of said plurality of execution units, of the processing of instructions of a preceding group of decoded instructions previously set-up by the set-up circuit;
• and
• an execution control circuit connected to said set-up circuit and said plurality of execution units, controlling initiation of execution of processing by each of the plurality of execution units for which the group of decoded instructions have been set-up, so that a start of execution of both one processing required by one of the group of decoded instructions and one or more other processings required by one or more other decoded instructions succeeding to the one decoded instruction within the groups are delayed, when the one processing needs to be delayed.

An information processing system for parallel execution of sequentially-ordered instructions, comprising:

• a plurality of execution units, each execution unit executing processing required by an instruction;
• a memory storing a series of instructions;
• an instruction fetch circuit connected to said memory, fetching instructions from said memory:
• an instruction decoding circuit connected to said instruction fetch circuit decoding the instructions fetched by said instruction fetch circuit;
• a set-up circuit, connected to said instruction decoding circuit and said plurality of execution units, setting-up decoded instructions into the execution units in such a manner that a group of decoded instructions to be executed next are set-up simultaneously into different ones of said plurality of execution units, each of which is capable of executing processing required by one of the instructions of the group of decoded instructions, in response to completion of execution, by different ones of said plurality of execution units, of the processing of instructions of a preceding group of decoded instructions previously set-up by the set-up circuit;
• wherein said set-up circuit includes means for selecting, as the group of decoded instructions to be executed next, a number of decoded instructions ordered sequentially and next in order to the preceding group of decoded instructions from among decoded instructions which have been already decoded but have not yet been set-up, under a condition that within the selected group no instruction has a longer required processing time than any of the instructions of the group of decoded instructions which succeed it in the sequential order;
• and
• said information processing system further comprising:
• an execution control circuit connected to said set-up circuit and said plurality of execution units, controlling initiation of execution of processing by each of the plurality of execution units for which the group of decoded instructions have been set-up, so that a start of execution of both one processing required by one of the group of decoded instructions and one or more other processings required by one or more other decoded instructions succeeding to the one decoded instruction within the groups are delayed, when the one processing needs to be delayed.

An information processing method for parallel execution of a plurality of sequentially-ordered instructions, wherein a plurality of execution units each execute processing required by one of said plurality of instructions, said method comprising steps of:

• storing in a memory a series of said plurality of instructions which include instructions which require different processing times than each other;
• fetching instructions from said memory;
• decoding the fetched instructions;
• setting-up the decoded instructions into the execution units in such a manner that a group of decoded instructions which are to be executed next and which may require processing times different than each other are set-up simultaneously into different ones of said plurality of execution units, each of which is capable of executing processing required by one of the instructions of the group of decoded instructions, in response to completion of execution by different ones of said plurality of execution units, of the processing of instructions of a preceding group of decoded instructions which have previously been setup, and which may require processing times different than each other;
• selecting as the group of decoded instructions to be executed next a number of decoded instructions ordered sequentially and next in order to the preceding group of decoded instructions from among decoded instructions which have been decoded already but have not yet been set-up, under a condition that within the selected group no instruction has a longer required processing time than any of the instructions of the group of decoded instructions which succeed it in the sequential order.

An information processing method for parallel execution of a plurality of sequentially-ordered instructions, wherein a plurality of execution units each execute processing required by one of said plurality of instructions, said method comprising steps of:

• storing a series of said plurality of instructions in a memory;
• fetching instructions from said memory;
• decoding the fetched instructions;
• setting-up decoded instructions into the execution units in such a manner that a group of decoded instructions to be executed next are set-up simultaneously into different ones of said plurality of execution units, each of which is capable of executing processing required by one of the instructions of the group of decoded instructions, in response to completion of execution by different ones of said plurality of execution units, of the processing of instructions of a preceding group of decoded instructions previously set-up by the setting-up step;
• and
• controlling initiation of execution of processing by each of the plurality of execution units for which the group of decoded instructions have been set-up, so that a start of execution of both one processing required by one of the group of decoded instructions and one or more other processings required by one or more other decoded instructions succeeding the one decoded instruction within the groups are delayed, when the one processing needs to be delayed.

An information processing method for parallel execution of a plurality of sequentially-ordered instructions, wherein a plurality of execution units each execute processing required by one of said plurality of instructions, said method comprising steps of:

• storing a series of said plurality of instructions in a memory;
• fetching instructions from said memory:
• decoding the fetched instructions;
• setting-up decoded instructions into the execution units in such a manner that a group of decoded instructions to be executed next are set-up simultaneously into different ones of said plurality of execution units, each of which is capable of executing processing required by one of the instructions of the group of decoded instructions, in response to completion of execution, by different ones of said plurality of execution units, of the processing of instructions of a preceding group of decoded instructions previously set-up by the setting-up step;
• selecting, as the group of decoded instructions to be executed next, a number of decoded instructions ordered sequentially and next in order to the preceding group of decoded instructions from among decoded instructions which have been already decoded but have not yet been set-up, under a condition that within the selected group no instruction has a longer required processing time than any of the instructions of the group of decoded instructions which succeed it in the sequential order;
• and
• controlling initiation of execution of processing by each of the plurality of execution units for which the group of decoded instructions have been set-up, so that a start of execution of both one processing required by one of the group of decoded instructions and one or more other processings required by one or more other decoded instructions succeeding the one decoded instruction within the groups are delayed, when the one processing needs to be delayed.