Symbol timing recovery based on complex sample magnitude

In a digital communication receiver, a method of recovering symbol timing from an analog signal configured as a stream of symbols, said method comprising the steps of:

• generating a clock signal which defines symbol timing;
• sampling said analog signal in response to said clock signal to generate a complex sample for each symbol;
• separating magnitude attributes of said complex samples from phase attributes of said complex samples so that said magnitude attributes are substantially insensitive to phase changes;
• identifying clock adjustment opportunities in response to said phase attributes of said complex samples;
• and
• enabling at least a portion of said magnitude attributes which are approximately coincident with said clock adjustment opportunities to adjust said symbol timing;
• and
• adjusting said symbol timing defined by said clock signal in response to said portion of said magnitude attributes.

In a digital communication receiver, a method of recovering symbol timing from an analog signal configured as a stream of symbols, said method comprising the steps of:

• generating a clock signal which defines symbol timing;
• sampling said analog signal in response to said clock signal to generate a complex sample for each symbol;
• identifying clock adjustment opportunities in response to phase relationships exhibited by said complex samples;
• and
• adjusting said symbol timing defined by said clock signal in response to magnitude relationships exhibited by said complex samples at approximately said identified clock adjustment opportunities.

A symbol synchronizer for recovering symbol timing in a digital communication receiver which receives an analog signal configured as a stream of symbols, said symbol synchronizer comprising:

• an oscillator for generating a clock signal which defines symbol timing;
• an analog-to-digital converter, coupled to said oscillator, for sampling said analog signal to generate a complex sample for each symbol;
• a phase processor, coupled to said converter, for identifying clock adjustment opportunities in response to phase relationships exhibited by said complex samples;
• and
• a magnitude processor, coupled to said converter, said phase processor, and said oscillator, for adjusting said symbol timing defined by said clock signal in response to magnitude relationships exhibited by said complex samples at approximately said identified clock adjustment opportunities.