Scan chain for shifting the state of a processor into memory at a specified point during system operation for testing purposes
AssigneeSilicon Graphics, Inc.
InventorsDerek Bosch, Susan Carrie
Life of this patent
Estimating the term…
Loading patent…
AssigneeSilicon Graphics, Inc.
InventorsDerek Bosch, Susan Carrie
Estimating the term…
In a semiconductor device having a processor for processing digital data and RAM for storing the digital data, an apparatus for accessing the state of the digital data stored in the RAM during system operation for testing purposes. A stall controller is used to stall the processor at a specified point of execution during system operation. The state of the processor at that particular point is shifted out of the registers by using a scan chain and temporarily stored into a buffer. A memory controller then instructs the RAM to write the data of interest into a specific set of test registers. The scan chain is routed through these test registers so that it can serially shift out the data written from the RAM. Thereby, the RAM contents can be accessed with minimal overhead by using the scan chain. Once the data has been shifted out from test registers, the current state of the processor that was stored into the buffer is fed back to the processor. The processor is unstalled and allowed to continue with its normal mode of operation.
In a semiconductor device having a processor for processing digital data and a memory for storing the digital data, an apparatus for accessing digital data stored in the memory at a particular point of execution of the semiconductor device, comprising:
In a processor of a computer system used for processing data, wherein the data is stored in a first memory of the computer system, a method for accessing the first memory at a particular point of execution during system operation, comprising the steps of:
A semiconductor chip comprising:
Dependencies are inferred from the claim text.