Method and apparatus for performing cache snoop testing on a cache system
AssigneeDell USA, L.P.
InventorSteve Cooper
Life of this patent
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AssigneeDell USA, L.P.
InventorSteve Cooper
Estimating the term…
A system and method for testing the snoop capabilities of a read-only code cache system. A test code sequence for testing the snooping operations of the read-only code cache is first loaded into system memory, and an identical copy of the test code sequence is loaded into the read-only code cache system at the same address. A direct memory access (DMA) transfer is then initiated to transfer one or more instructions to overwrite a portion of the system memory where the test code sequence is located. If the snooping functions of the read-only code cache are operating properly, the code cache will detect the cycles and invalidate the respective lines in the code cache where the instructions are located. Upon completion of the direct memory access transfer, the CPU performs the remainder of the test code sequence and determines whether the snooping operations performed properly.
A method of performing cache snoop testing on a cache system in a computer system comprising a CPU, system memory coupled to the CPU, and a cache system coupled between the CPU and the system memory, wherein the cache system includes snooping logic for snooping bus master transfers to system memory, the method comprising the steps of:
A computer system which performs cache snoop testing on a read-only cache system, comprising:
A method for performing cache snoop testing on a computer comprising a CPU, a cache, and a system memory such that the cache is coupled between the CPU and the system memory, the method comprising:
Dependencies are inferred from the claim text.