Low power pulse generator for smart voltage flash eeprom
AssigneeIntel Corporation
InventorJahanshir J. Javanifard
Life of this patent
Estimating the term…
Loading patent…
AssigneeIntel Corporation
InventorJahanshir J. Javanifard
Estimating the term…
A pulse generator circuit. The pulse generator circuit includes a first oscillator and a second oscillator coupled to the output of the first oscillator. The first oscillator is for outputting a first signal having a first frequency, and the second oscillator for outputting a second signal having a second frequency that is greater than the first frequency. The second signal is fed back to the second oscillator for controlling the operation of the second oscillator. The second oscillator is enabled to output the second signal in response to a rising edge of the first signal and disabled from outputting the second signal in response to a second edge of the second signal. To reduce power consumption of the pulse generator circuit, each of the oscillator circuits may be a ring oscillator comprising a plurality of inverters coupled in series and a feedback conductor coupled to the output of a last inverter and the input of a first inverter. Each inverter is coupled to an operating supply voltage via a corresponding pull-up transistor that is biased to operate in a subthreshold region, and each inverter is coupled to system ground via a corresponding pull-down transistor that is biased to operate in the subthreshold region so that the current consumed by the oscillator circuits is reduced.
A nonvolatile memory device comprising:
Dependencies are inferred from the claim text.