System and method for modelling integrated circuit bridging faults
AssigneeHewlett-Packard Company
InventorPeter C. Maxwell
Life of this patent
Estimating the term…
Abstract
A system and method for simulating bridging faults uses means for retrieving, as a function of voltage, strengths of simple transistor circuits relative to the strength of a reference device. This relative strength is used to determine the voltage at bridge faults. The bridge voltage is compared to the threshold voltages of devices connected to the bridging node to determine the logic interpretation by such gates of such voltage. Other systems and methods are disclosed.
Claims7
A method for simulating bridging faults, wherein a bridge fault occurs at a node having n type transistors grounding the node and p type transistors driving the node to a reference voltage, comprising:
- (a) storing strengths of n and p transistor circuits relative to strength of a reference device as a function of voltage level in tables;
- (b) determining an equivalent circuit of p devices equivalent to the structure driving a bridge fault to the reference voltage;
- (c) determining an equivalent circuit of n devices equivalent to the structure grounding a bridge fault;
- (d) using said tables to determine a first ratio of the strength of the equivalent n circuit to the strength of the equivalent p circuit;
- and
- (e) determining, based upon said first ratio, how down-stream gates interpret said bridge fault.
An Electronic Computer Aided Design (ECAD) system, comprising:
- a central processing unit operable to execute executable code;
- a random access memory connected to said central processing unit;
- a secondary storage device connected to said CPU, containing a circuit design program, in the form of executable code, having a bridge fault simulator for simulating the output value of a bridge fault in a circuit with a voltage source and a ground, wherein a first network of transistors connect the bridge fault with the voltage source and a second network of transistors connect the bridge fault with the ground, wherein the bridge fault drives a plurality of downstream gates, said circuit design program consisting of:
- (a) a database of transistor lengths, widths, and input threshold voltage values for a standard cell library;
- (b) a plurality of tables, each table uniquely corresponding to a particular number of transistors of a given type, wherein each row in said tables correspond to a voltage and for each voltage each table contains a strength value of a circuit having the specified number of transistors of the given type;
- and
- (c) logic operable to:
- (c.1) use said database and said tables to determine relative strength of said first network and of said second network;
- (c.2) determine a first ratio of said relative strengths;
- (c.3) determine a second ratio of relative strengths required to produce the threshold value of each down-stream gate;
- and
- (e.4) compare the first and second ratios to determine how said down-stream gate interprets the bridge fault;
- wherein, said CPU is operable to retrieve and execute said circuit design program from said memory.
A bridge fault simulator operable to simulate voltage levels at a bridge faults and to determine how gates down-stream from the bridge faults interpret the bridge faults, wherein each bridge fault is a connection between a circuit of p-type devices driving a node to a reference voltage and a circuit of n-type devices ground said node, comprising:
- a first memory portion containing lengths, widths, and thresholds for a standard cell library;
- a second memory potion containing tables of strengths of combinations of devices relative to unit device strength as a function of voltage level;
- and
- a simulation logic, having:
- a first retrieve logic connected to said first memory portion connected to a first data structure having storage locations for transistor lengths and widths of said p-type circuit and said n-type circuit, and input thresholds of gates connected to said bridge fault;
- a second retrieve logic connected to said second memory portion and connected to a second data structure having locations to store strengths for p-type devices driving a bridge fault to a reference voltage and for n-type devices grounding the bridge fault;
- a width multiplier connected to said second data structure;
- a ratio logic connected said second data structure and to a third data structure having a storage location for a ratio;
- and
- a comparator connected to said threshold storage of said first data structure and to said third data structure, wherein said comparator indicates how said gates connected to said bridge fault interpret said bridge fault.
A bridge fault simulator operable to simulate the down-stream effects of a bridge fault, wherein a bridge fault is caused by connecting a node to ground via a first circuit of n-type devices and to a reference voltage via a second circuit of p-type devices, comprising:
- a central processing unit (CPU) for executing program instructions;
- a database connected to said CPU for storing tables of strengths of combinations of devices relative to unit device strength as a function of voltage;
- a memory connected to said central processor and containing a simulation program, having:
- strength determination logic connected to said database operable to determine strengths of said first and second devices at a given voltage wherein said determination of strengths includes determination of equivalent circuits corresponding to the combination of devices of said tables;
- voltage calculation logic connected to said strength determination logic and operable to use said strengths to calculate a voltage using resistive division;
- a control loop connected to said voltage calculation logic and operable to iteratively adjust said strengths such that said calculated voltage converges;
- and
- interpretation logic connected to said control loop and operable to accept said converged voltage to determine down-stream interpretation of said voltage.
Dependencies are inferred from the claim text.