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US 5,670,828 AGranted
Tunneling technology for reducing intra-conductive layer capacitance
AssigneeAdvanced Micro Devices, Inc.
InventorsRobin W. Cheung, Simon S. Chan, Richard J. Huang
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Abstract
The control speed of semiconductor circuitry is increased by forming air tunnels in the interwiring spaces of a conductive pattern to reduce intra-conductive layer capacitance.
Claims21
A semiconductor device comprising:
- a substrate;
- an insulating layer formed on the substrate;
- and
- a conductive pattern formed on the insulating layer;
- wherein the conductive pattern comprises conductive lines separated by interwiring spaces, and a selected plurality of the interwiring spaces contain air forming air tunnels in the interwiring spaces,
- wherein the interwiring spaces containing air tunnels comprise:
- a dielectric liner on the conductive lines and substrate;
- and
- a capping layer enclosing air within each interwiring space to form the individual air tunnels.
6 more elements
Dependencies are inferred from the claim text.