US 5,669,002 A · Multi-processor resource locking mechanism with a lock register corresponding to each resource stored in common memory

Abstract

A method and apparatus to reduce bus usage and to increase resource locking protocol compatibility within a heterogeneous processing environment. Lock indicators are maintained in stores designated as lock registers and access to a resource is gained by any processor depending upon the status of a lock register associated with that resource. Access to a locked resource is barred to all but the locking processor, and only the processor which has set a lock can use or release that locked resource. A lock register controller controls the contents of the lock registers. A given processor P1-PN is identified by a unique ID vector G1-GN. These vectors are used to indicate both that a resource is locked and to indicate the identity of the locking processor. An unlocked resource is identified by a status vector (G.O slashed.). In a preferred embodiment, acquisition of exclusive access to an available resource is obtained with a simple read command; release of exclusive access is achieved with a simple write executed by the processor which has set the lock. By convention, processors will not access a resource requiring exclusive access until an inquiry of the associated lock register returns the G.O slashed. vector to the inquiring processor.

Claims45

Dependent claims

In a computer system operable with two processors couplable via a communication bus to a plurality of lock registers, the processors and registers couplable via the bus to a resource, such resource comprising a plurality of stored records each one of which can be indicated as locked for exclusive use, and the lock register addressable by an address unique to the lock register on the bus, a method for indicating locked status of each one of the plurality of stored records, the method comprising the steps of:

(a) associating each one of the lock registers with a corresponding one of the stored records, such lock registers and records stored in a common memory coupled to the communication bus;
(b) assigning or denying exclusive use of the stored record to a given one of the processors depending on whether the stored record is unlocked or locked at the time the given processor issues a read command via the bus to the unique address of the lock register, and
(c) indicating a locked status in the lock register and, if locked by a processor other than the given processor, returning from the lock register to the given processor an indication that the stored record is locked by the other processor, such that, without further commands from the given processor, the stored record is indicated to be available for use only by the given processor.

A resource locking method for use in a data processing system operable with a plurality of processors, a resource which can be used by the processors but requires exclusive use, and a lock register, the processors, resource and register coupled via a communication bus, the lock register being addressable by an address unique to the lock register on the bus, the bus being utilizable in a sequence of bus use intervals, one bus use interval being defined as having a duration beginning from when a given one of the processors accessing the bus issues a read command so as to obtain the contents of the lock register and terminating when that processor receives the contents of the lock register, the method comprising the steps of

(a) associating each one of the lock registers with the resource, each resource comprising a record stored in a common memory with the lock registers and
(b) in a given bus interval and in response to a read command addressed by a given one of the processors to the lock register's unique address, indicating either (i) that the resource is locked for exclusive use by the given processor and, if locked by an other processor, returning from the lock register an indication to the given processor that the resource is locked by the other processor, and causing the lock to be set in the lock register in the same given interval, if the resource is unlocked at the beginning of the given interval, or (ii) that the resource is not locked for exclusive use by the given processor, if the resource is locked at the beginning of the given interval.

A computer system having a resource locking capability, comprising

(a) two processor nodes,
(b) a plurality of resources, each one thereof comprising a stored record, coupled to the processor nodes and to which each node may seek exclusive access,
(c) a plurality of lock registers stored in a common memory with the resources, coupled to the resources and to the processor nodes via a bus, each one of the lock registers being associated with a corresponding one of the resources and addressable by an address unique to the lock register on the bus, and
(d) means for responding to a read command issued by a given one of the processors to the unique address of the lock register by assigning or denying exclusive use of the resource to the given one of the processors depending on whether the resource is unlocked or locked at the time the given processor issues the read command, and
(e) means for indicating in the lock register that the resource is locked and, if locked by an other processor, returning from the lock register an indication to the given processor that the resource is locked by the other processor, such that, without, such that, without further commands from the given processor, the resource is identified for use only by the given processor.

2 more elements

A computer system having a resource locking capability, comprising

(a) a plurality of processor nodes,
(b) a plurality of resources, each of such resources comprising a stored record, coupled to and to which the plurality of processor nodes each may seek exclusive access, each processor node identified by a unique node ID vector and the system retaining a status vector,
(c) a plurality of lock registers stored in a stored in a common memory with the resources, each one being associated with a corresponding one of the plurality of resources, coupled to the resources and processor nodes, a respective lock register being associated with a respective one of the plurality of resources, and being addressable by an address unique to the respective lock register, and
(d) a lock register controller interposed between the lock registers and the processor nodes, and configured to write the node ID vector of a given processor node in a given lock register which the given processor node has addressed with a read command directed to the given lock register's unique address if the status vector is stored in the given lock register, and further configured to communicate the status vector stored in the given lock register to the given processor node to indicate that the resource associated with the given lock register has been locked for exclusive use by the given process node and, if locked by an other processor, returning from the lock register to the given processor, an indication that the resource is locked by the other processor, and further configured to communicate a different vector to the given processor node to indicate that the resource associated with the given lock register has not been locked for exclusive use by the given processor node.

1 more element

Dependencies are inferred from the claim text.

Multi-processor resource locking mechanism with a lock register corresponding to each resource stored in common memory

Life of this patent

Multi-processor resource locking mechanism with a lock register corresponding to each resource stored in common memory

Life of this patent

Abstract

Claims45