US 5,668,973 A · Protection system for critical memory information

Abstract

A computer system for protecting memory comprising a processor having address outputs and executing a stored program, a memory having a control input, an address-decoder for providing a control signal to the control input of the memory in response to associated address outputs from the processor, and a window circuit. The window circuit comprises a range detector responsive to the address outputs for generating a range-detection signal indicative of an address from the processor being within a protected range, the protected range non-identical to the entirety of the space of addresses within the memory. Access to memory locations within the protected range is permitted only if a request signal is received from the processor. If the request signal is asserted for an unexpectedly long time an error condition is annunciated, for example the processor is reset.

Claims19

Dependent claims

A computer system for protecting memory comprising a processor having address outputs and executing a stored program, a memory having a control input, and window means, said window means comprising:

range detection means responsive to the address outputs for generating a range-detection signal indicative of an address from the processor being within a protected range, the protected range non-identical to the entirety of the space of addresses within the memory;
request means responsive to an output from the processor for recognizing a request from the processor and generating a request signal;
and
denying means intermediate the processor and the memory and responsive to the range-detection signal and the request signal for denying the control input to the memory if the range-detection signal is asserted in the absence of the request signal.

1 more element

A method for protecting memory for use in a computer system comprising a processor having address outputs and executing a stored program, a memory having a control input, and window means, said window means comprising:

range detection means responsive to the address outputs for generating a range-detection signal indicative of an address from the processor being within a protected range, the protected range non-identical to the entirety of the space of addresses within the memory;
request means responsive to an output from the processor for recognizing a request from the processor and generating a request signal;
and denying means intermediate the processor and the memory and responsive to the range-detection signal and the request signal for denying the control input to the memory if the range-detection signal is asserted in the absence of the request signal;
the method comprising the steps of:
receiving address outputs from the processor at the range detection means;
generating the range-detection signal if the address outputs from the processor are indicative of the address from the processor being within the protected range;
and
denying the control input to the memory if the range-detection signal is asserted in the absence of assertion of the request signal.

5 more elements

Dependencies are inferred from the claim text.

Protection system for critical memory information

Life of this patent

Protection system for critical memory information

Life of this patent

Abstract

Claims19