Method and system for efficient miss sequence cache line allocation utilizing an allocation control cell state to enable a selected match line

A data processing system comprising:

• a processor;
• a main memory store;
• a data cache array for temporarily storing blocks of information from said main memory store, said data cache array comprising:
• a plurality of cache lines, each of said plurality of cache lines including:
• a selected block of information;
• a content addressable field, said content addressable field containing at least a portion of an address for said selected block of information;
• a match line coupled to said content addressable field;
• a data status field, said data status field including an indication of validity or invalidity of said selected block of information;
• and
• an allocation control cell coupled to said match line;
• a least recently utilized logic block within said data cache array for selecting and setting a particular allocation control cell in a selected cache line among a plurality of cache lines in response to an indication of invalidity of said selected blocks of information within a cache line or in response to utilization of said plurality of cache lines wherein said match line is enabled for said selected cache line;
• and
• cache line allocation means for selecting a particular cache line among said plurality of cache lines for replacement in response to a state of said allocation control cell within said particular cache line.

A method for cache line allocation within a data processing system, said method comprising the steps of:

• providing a data cache array having a plurality of groups of cache lines;
• within each cache line:
• storing a selected block of information;
• storing at least a portion of a multi-bit address for said selected block of information within a content addressable field;
• coupling a match line to said content addressable field;
• and
• storing an indication of validity or invalidity of said selected block of information within a data status field;
• providing an allocation control cell within said data cache array coupled to a match line within each cache line;
• altering the state of each allocation control cell within a group of cache lines in response to an indication of invalidity of said selected blocks of information within a cache line or in response to utilization of said group of cache lines wherein said match line is enabled for a selected cache line;
• and
• selecting a particular cache line among said group of cache lines for replacement in response to a state of said allocation control cell within said particular cache line.