Polled FIFO flags
AssigneeCypress Semiconductor Corporation
InventorDavid Barringer
Life of this patent
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Abstract
A First-In-First-Out (FIFO) memory device having polled status flags to provide the status of the FIFO memory device when requested by an external source. The write pointer and the read pointer in the memory device specifies the memory location which is to be accessed during the next write operation or during the next read operation, respectively. The write pointer generates a value indicating the number of write operations that have been performed and the read pointer generates a value indicating the number of read operations that have been performed. In response to a polling signal from the external source, the FIFO memory device outputs the value indicating the number of locations that are currently written (i.e. used) or the value indicating the number of locations currently unwritten (i.e. available for use).
Claims14
A First-In-First-Out (FIFO) Integrated Circuit (IC) comprising:
- a memory having a plurality of storage locations;
- an internal address circuit coupled to said memory and configured to indicate one of said plurality of storage locations to be accessed during a next write operation and one of said plurality of storage locations to be accessed during a next read operation, said internal address circuit further having a read pointer and write pointer;
- and logic circuitry coupled to said internal address circuit and configured to receive one or more polling signals and to generate one or more absolute pointer values in response thereto, said absolute pointer values indicating one or more absolute states of said storage locations of said memory array.
An apparatus for generating polled status flags, comprising:
- a memory having a plurality of storage locations;
- a first pointer and a second pointer coupled to said memory, said first pointer indicates a storage location of said memory that will be accessed during a next write operation, said second pointer indicates said storage location of said memory that will be accessed during a next read operation;
- a control logic coupled to said first pointer and said second pointer wherein said control logic receives a first polling signal and a second polling signal;
- a first register coupled to said first pointer wherein said first register having an output for providing a first value indicating a first state of said memory in response to said first polling signal;
- and
- a second register coupled to said second pointer wherein said second register having an output for providing a second value indicating a second state of said memory in response to said second polling signal.
A method for generating polled status flags, comprising the steps of:
- (a) receiving a polling signal from an external source;
- (b) determining a state of a Memory Array;
- and
- (c) outputting a value indicating an absolute state of said memory array to said external source.
Dependencies are inferred from the claim text.