Fast read domino SRAM
AssigneeInternational Business Machines Corporation
InventorsJohn Stephen Muhich, Robert Paul Masleid, Larry Bryce Phillips
Life of this patent
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Abstract
A system and method is disclosed for increasing read performance of domino SRAMS. A conventional word-line, which drives two transistors per cell, is replaced with two separate word-lines. The first word-line drives one transistor and the second word-line drives the other transistor. The first word-line is used to write zeros into cells, while the second word line is used to both write ones into cells and to read the contents of the cells. Since the second word-line drives only one transistor during read operations, one-half of the gate load on the writeead word-line is eliminated.
Claims7
A domino random access memory having a core cell coupled to a local bit line, the domino random access memory comprising:
- a domino node coupled to the local bit line;
- a first transistor;
- a first word line coupled to the first transistor;
- a second transistor coupled to the local bit line;
- and
- a second word line coupled to the second transistor,
- the first and second word lines for reading and writing data to the core cell, wherein when reading data from the core cell, only the second word-line is activated to drive the second transistor, such that when a binary 1 is read from the core cell, the second word-line and second transistor produce a voltage across the local bit line causing the domino node to discharge.
A method for increasing the read performance of a domino static random access memory, the domino static random access memory including a local bit line coupled between a local cell group and a data input line, the local bit line coupled to at least one core cell for storing data, wherein the at least one core cell includes a first and second transistor, the method comprising the steps of:
- (a) coupling a first word-line to the first transistor;
- (b) coupling a second word-line to the second transistor;
- (c) writing data to the at least one core cell by activating the first word-line;
- and
- (d) writing data and reading the data stored in the at least one core cell by activating the second word-line.
A domino random access memory comprising:
- a cell group including at least one core cell;
- a domino node coupled to the cell group for providing a sense function for the cell group;
- the at least one core cell including,
- a first transistor,
- a first word line coupled to the first transistor,
- a second transistor coupled to the domino node, and
- a second word line coupled to the second transistor, wherein only the first word line is activated to write a binary zero to the core cell, and only the second word-line is activated when reading the core cell, such that when a binary 1 is read from the core cell, the second word-line and second transistor produce a voltage across the local bit line causing the domino node to discharge.
Dependencies are inferred from the claim text.