Ferroelectric memory cell and reading/writing method thereof
AssigneeNEC Corporation
InventorAtsushi Yamashita
Life of this patent
Estimating the term…
Abstract
A ferroelectric memory cell is provided, which enables to store a plurality of data values therein, and writing and reading methods thereof. The memory cell is includes first to n-th ferroelectric capacitors connected in parallel where n is an integer greater than unity. The first to n-th capacitors have different reverse voltages from each other, where each of the reverse voltages is defined as an applied voltage at which a direction of polarization is reversed. Each of the first to n-th capacitors stores a two-valued information. Each of the first to n-th capacitors stores a two-valued information and therefore, the memory cell can store 2.sup.n data values therein. The integration scale can be enhanced.
Claims16
A ferroelectric memory cell comprising:
- first to n-th ferroelectric capacitors connected in parallel where n is an integer greater than unity;
- and
- said first to n-th capacitors having different reverse voltages from each other, where each of said first to n-th reverse voltages is defined as an applied voltage at which a direction of polarization is reversed;
- wherein each of said first to n-th capacitors stores a two-valued information, thereby generating a function of a 2.sup.n -bit or 2.sup.n -valued memory cell.
A method of writing a data value into a ferroelectric memory cell;
- said cell having first to n-th ferroelectric capacitors connected in parallel where n is an integer greater than unity;
- said first to n-th capacitors having different reverse voltages from each other, where each of said first to n-th reverse voltages is defined as an applied voltage at which a direction of dielectric polarization is reversed;
- and
- each of said first to n-th capacitors storing a two-valued information;
- each method comprising:
- (a) a first step of writing a data value into one of said first to n-th capacitors having a relatively highest reverse voltage;
- (b) second to (n-1)-th steps of writing data values into said second to (n-1)-th capacitors in descending order of magnitude of their reverse voltages, consecutively;
- and
- (c) an n-th step of writing a data value into one of said first to n-th capacitors having a relatively lowest reverse voltage.
A method of reading a data value from a ferroelectric memory cell;
- said cell having first to n-th ferroelectric capacitors connected in parallel where n is an integer greater than unity;
- said first to n-th capacitors having different reverse voltages from each other, where each of said first to n-th reverse voltages is defined as an applied voltage at which a direction of dielectric polarization is reversed;
- and
- each of said first to n-th capacitors storing a two-valued information;
- said method comprising:
- (a) a first step of reading a data value from one of said first to n-th capacitors having a relatively lowest reverse voltage;
- (b) second to (n-1)-th steps of reading data values from said second to (n-1)-th capacitors in ascending order of magnitude of their reverse voltages, consecutively;
- and
- (c) an n-th step of reading a data value from one of said first to n-th capacitors having a relatively highest reverse voltage as a last step.
A ferroelectric memory cell comprising:
- first to n-th ferroelectric capacitors connected in parallel where n is an integer greater than unity;
- said first to n-th capacitors having different reverse voltages from each other;
- each of said first to n-th reverse voltages being defined as an applied voltage at which a direction of polarization is reversed;
- said first to n-th capacitors having first to n-th hysteresis curves, respectively;
- said first to n-th hysteresis curves being combined, generating an overall hysteresis curve having 2.sup.n different polarized states;
- said 2.sup.n different polarized states being assigned to data values, respectively;
- and
- each of said first to n-th capacitors storing a two-valued information, thereby generating a function of a 2.sup.n -bit or 2.sup.n -valued memory cell.
A method of writing a data value into a ferroelectric memory cell;
- said cell having first to n-th ferroelectric capacitors connected in parallel where n is an integer greater than unity;
- said first to n-th capacitors having different reverse voltages from each other, where each of said first to n-th reverse voltages is defined as an applied voltage at which a direction of dielectric polarization is reversed;
- and
- each of said first to n-th capacitors storing a two-valued information;
- wherein said method comprises first to n-th steps of writing data values into said first to n-th capacitors in descending order of magnitude of their reverse voltages, which are performed consecutively.
A method of reading a data value from a ferroelectric memory cell;
- said cell having first to n-th ferroelectric capacitors connected in parallel where n is an integer greater than unity;
- said first to n-th capacitors having different reverse voltages from each other, where each of said first to n-th reverse voltages is defined as an applied voltage at which a direction of dielectric polarization is reversed;
- and
- each of said first to n-th capacitors storing a two-valued information;
- wherein said method comprises first to n-th steps of reading data values from said first to n-th capacitors in ascending order of magnitude of their reverse voltages, which are performed consecutively.
Dependencies are inferred from the claim text.