Thin film transistor panel having an extended source electrode

A thin film transistor panel comprising:

• a transparent substrate;
• a plurality of pixel electrodes arranged on said transparent substrate in a matrix form;
• a plurality of gate lines provided in association with individual rows of said matrix of said pixel electrodes;
• a plurality of data lines provided in association with individual columns of said matrix of said pixel electrodes;
• a plurality of thin film transistors arranged in association with said pixel electrodes, each thin film transistor having a gate electrode formed at one side of an associated one of said gate lines and protruding therefrom, a gate insulating film covering said gate electrode, a semiconductor film formed, facing said gate electrode, on said gate insulating film, and source and drain electrodes formed on both sides of said semiconductor film along said associated gate line, said source electrode being connected to an associated one of said pixel electrodes;
• each gate line having an auxiliary electrode provided in association with a pixel-electrode connecting side of each thin film transistor, arranged along the respective gate line, said auxiliary electrode extending in an extending direction of said gate electrode;
• a capacitance compensation electrode formed integrally as one single continuous piece with said source electrode, said capacitance compensation electrode being of the same continuous material as said source electrode, and said capacitance compensation electrode facing a side edge portion of said auxiliary electrode on a thin film transistor side via said insulating film;
• a first capacitor formed between said gate electrode and said source electrode, and a second capacitor formed between said auxiliary electrode and said capacitance compensation electrode and having a capacitance which cancels out a variation in a capacitance of said first capacitor,
• a sum of said capacitance of said first capacitor and said capacitance of said second capacitor being substantially constant regardless of a variation in a fabrication process.

A thin film transistor panel comprising:

• a substrate;
• a plurality of pixel electrodes arranged in a matrix on said substrate such that pixel electrodes in a column direction are arranged in columns in a zigzag manner with regard to pixel electrodes in adjacent columns with a pitch of 1/2 of a width of said pixel electrodes;
• a plurality of gate lines provided in association with individual rows of said matrix of said pixel electrodes and each gate line extending in a row direction;
• a plurality of data lines extending in the column direction of said pixel electrodes and said data lines being arranged in said matrix in a zigzag manner so as to correspond to each of the columns of said pixel electrodes;
• a plurality of thin film transistors arranged in association with said pixel electrodes, each thin film transistor having a gate electrode formed integrally at one side of an associated one of said gate lines and protruding therefrom, a gate insulating film covering said gate electrode, a semiconductor film formed, facing said gate electrode, on said gate insulating film, a first electrode connected to said semiconductor film and to said associated pixel electrode, and a second electrode connected to said semiconductor film and to an associated one of said data lines,
• each gate line having an extending auxiliary electrode formed for each thin film transistor, and positioned adjacent to said first electrode;
• and
• each first electrode having an extending part of the respective first electrode, the extending part of each said first electrode facing said auxiliary electrode via an insulating film.