Horizontal magnifying circuit for video signals
AssigneeNEC Corporation
InventorsHiromitsu Takano, Nobuya Nakamoto
Life of this patent
Estimating the term…
Abstract
In a structure composed having a one-bit counter, a D-FF, a selector, and an AND gate, while the signal level of a thin-out signal is low, a read clock signal of a line memory is thinned out. Thus, video signals (a Y signal, a CR signal, and a CB signal) read from a line memory are horizontally magnified. At this point, both edges of a low portion of the input thin-out signal are synchronized with even number data of color difference signals (CR/CB) read from the line memory after a start signal that is a video signal read start signal is input.
Claims3
A horizontal magnifying circuit for NTSC digital video signals, comprising:
- a line memory for storing color difference signals of the video signals and a luminance signal thereof so that the color difference signals correlate with the luminance signal,
- means for reading the color difference signals from the line memory corresponding to a read clock signal so that the number of samples of the color difference signals is 1/2 or 1/4 the number of samples of the luminance signal, and
- means for thinning out the read clock signal stored in the line memory while a thin-out signal that is input at predetermined intervals is active so as to horizontally magnify the video signals read from the line memory, the horizontal magnifying circuit comprising:
- an adjusting circuit for synchronizing both edges of the active portion of the thin-out signal with even number data of the color difference signals read from the line memory after a start signal that is a read start signal for the video signals stored in the line memory is input.
Dependencies are inferred from the claim text.