Real-time television image pixel multiplication methods and apparatus

Abstract

Circuitry and methods multiply the number of pixels in a television image without the need for changes in current transmission standards. One memory array or storage buffer is used to store one image, while data is being read from another memory or array storage buffer. The role of the two memory arrays changes with every incoming image, the memory array that was in the read mode is switched to the write mode, and vice-versa. The image read is interpolated through pixel replication in two-dimensions, followed by a square symmetrical two-dimensional low-pass filter, which provides interpolation based on the Sampling Theorem. This may be a two-dimensional (2-D) circularly-symmetrical high-pass filter for image enhancement. Interpolation may alternatively be carried out through a one-dimensional (1-D) filter, or through the Discrete Cosine transform. A description of a circuit realizing a 2-D infinite impulse response filter and the filter coefficients for a square symmetrical low-pass filter having near-linear phase is provided. Circuits for addressing the two memory arrays are also described for displaying video images through either progressive or interlaced scanning.

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