CMOS buffer having stable threshold voltage

A complementary polarity transistor buffer circuit switchable between first and second states, said buffer circuit comprising:

• first and second power busses;
• a main buffer stage having a buffer input and a buffer output, the main buffer stage comprising a first transistor of a first polarity and comprising drain and source terminals and a second transistor of a second polarity, opposite the first polarity, with the first and second transistors being connected in series so as to define a first current path when the buffer circuit is switching between the states, with the first and second transistors being conductive and non-conductive, respectively, when buffer circuit is in the first state and non-conductive and conductive, respectively, when the buffer circuit is in the second state;
• and
• a reference current circuit configured to cause a predetermined amount of current to flow through the first current path when the buffer is switching between the states, the reference current circuit comprising a reference transistor of the first polarity which conducts a reference current having a magnitude which is related to the magnitude of the predetermined amount of current, with the reference transistor having a drain and source terminal, one of which is connected directly to one of the drain and source terminals of the first transistor.

A method of controlling the trip point voltage of a buffer circuit having a buffer circuit input and a buffer circuit output, with the buffer circuit comprising a first transistor of a first polarity and having a gate coupled to the buffer circuit input and a second transistor of a polarity opposite the first polarity which is connected in series with the first transistor and having a gate coupled to the buffer circuit input, with the trip point voltage being defined as the voltage of the buffer input when the buffer input and output voltages are of equal magnitude, the method comprising the following steps:

• generating a reference current by applying a first biasing voltage across drain-source terminals of a reference transistor of the first polarity, with the first biasing voltage being substantially equal to the trip point voltage of the buffer circuit;
• deriving a first current from the reference current;
• and
• causing the first current to flow through the first transistor when the buffer circuit input is at the trip point voltage.

A method of controlling operation of a complementary polarity transistor buffer which includes a first transistor connected in series with a second transistor, with the first and second transistors being N and P channel transistors, respectively and having gate terminals connected to a common buffer input, the method comprising the following steps:

• providing a reference transistor, with the reference transistor being an N channel transistor;
• applying a first reference voltage across gate-source terminals of the reference transistor and a second reference voltage across source-drain terminals of the reference transistor so that a reference current flows through the reference transistor;
• and
• causing a first current to flow through the first transistor when a voltage at the buffer input is equal to the first reference voltage.

A complementary polarity transistor buffer circuit switchable between first and second states, said buffer circuit comprising:

• first and second power busses;
• a main buffer stage having a buffer input and a buffer output, the main buffer stage comprising a first transistor of a first polarity and comprising drain and source terminals and a second transistor of a second polarity, opposite the first polarity, with the first and second transistors being connected in series so as to define a first current path when the buffer circuit is switching between the states, with the first and second transistors being conductive and non-conductive, respectively, when the buffer circuit is in the first state and non-conductive and conductive, respectively, when the buffer circuit is in the second state;
• and
• a reference current circuit configured to cause a predetermined amount of current to flow through the first current path when the buffer is switching between the states, the reference current circuit comprising a reference transistor of the first polarity which conducts a reference current having a magnitude which is related to the magnitude of the predetermined amount of current and comprising biasing circuitry connected to the reference transistor configured to bias the drain-source terminals of the reference transistor with a voltage substantially equal to a desired trip point voltage of the buffer circuit where the buffer input and output voltages are equal.