Thin film transistor array panel for a liquid crystal display

A thin film transistor array panel of a liquid crystal display having a plurality of transistors, comprising:

• a transparent substrate;
• a plurality of coplanar silicon regions formed over the substrate, each silicon region having a source and a drain region;
• a first insulating layer formed over the silicon regions, said first insulating layer having a first thickness;
• a plurality of gate electrodes, each gate electrode formed on the first insulating layer above each silicon region;
• a plurality of gate line electrodes formed on the first insulating layer from the same conductive layer as the gate electrodes, the gate line electrodes having a first width, wherein each said gate electrode is positioned between two associated said gate line electrodes, and each said gate electrode is separated by a predetermined distance from each of said two associated gate line electrodes;
• a second insulating layer having a second thickness, formed over the gate electrodes and the gate line electrodes, having a plurality of first contact holes to expose respective portions of the gate electrodes and the gate line electrodes;
• and
• a plurality of metal lines formed over the second insulating layer, having a second width, wherein each metal line is ohmically connected to one of the gate electrodes and said two associated gate line electrodes through the first contact holes.