Active matrix crystal display apparatus using thin film transistor

A semiconductor device, comprising:

• a substrate, and
• a semiconductor switching element comprising:
• a gate electrode on said substrate,
• an insulating layer and a semiconductor layer, providing a laminate layer on said gate electrode, and
• a source electrode and a drain electrode which are formed so as to cross over said gate electrode, wherein
• said laminate layer has an end portion which is tapered, and said gate electrode has an end portion which is tapered,
• said gate electrode is made of a material selected from a group consisting of Ta, indium-tin oxide, MoSi.sub.2, TaSi.sub.2, CrSi.sub.2, WSi.sub.2, TiN, and TaN, and
• a taper angle .theta.g of said end portion of said gate electrode is formed so as to be less than 90.degree., and also equal to or less than three times, of a taper angle .theta.s of said end portion of said laminate layer.

A semiconductor device, comprising:

• a substrate, and
• a semiconductor switching element comprising:
• a gate electrode on said substrate,
• an insulating layer and a semiconductor layer, providing a laminate layer on said gate electrode, and
• a source electrode and a drain electrode which are formed so as to cross over said gate electrode, wherein
• said laminate layer has an end portion which is tapered, and said gate electrode has an end portion which is tapered,
• said gate electrode is made of a material selected from a group consisting of Ta, Cr, Mo, W, Al, Cu, Au, and Ni, and
• a taper angle .theta.g of said end portion of said gate electrode is formed so as to be less than 90.degree., and also equal to or less than three times, of a taper angle .theta.s of said end portion of said laminate layer.

A semiconductor device, comprising:

• a substrate, and
• a semiconductor switching element comprising:
• a gate electrode on said substrate,
• an insulating layer and a semiconductor layer, providing a laminate layer on said gate electrode, and
• a source electrode and a drain electrode which are formed so as to cross over said gate electrode, wherein
• said insulating layer has an end portion which is tapered, and said gate electrode has an end portion which is tapered, said insulating layer being provided on said gate electrode, and
• said gate electrode and said insulating layer are so composed that a taper ratio (B/A) of gate electrode thickness (B) to planar projected distance from an end of a lower surface to an end of an upper surface of the gate electrode (A) is equal to or less than three times of a taper ratio (B'/A') of said insulating layer thickness (B') to a planar projected distance from an end of a lower surface to an end of an upper surface of said insulating layer (A').

A liquid crystal display apparatus comprising

• thin film transistors, which are arranged in a vicinity of intersections of a plurality of scanning signal lines with a plurality of image signal lines, said scanning signal lines and said image signal lines being formed on one substrate of paired substrates so as to cross over each other, gate electrodes, drain electrodes, and source electrodes of the thin film transistors being respectively connected to said scanning signal lines, said image signal lines, and pixel electrodes, the thin film transistors further comprising a laminate layer formed of an insulating layer and a semiconductor layer, the laminate layer being on the gate electrodes, wherein
• the laminate layer has an end portion which is tapered, each of said gate electrodes having an end portion which is tapered,
• a taper angle of the end portion of each of the gate electrodes .theta.g is formed so as to be less than 90.degree., and also equal to or less than three times, of a taper angle of the end portion of each laminate layer .theta.s, and
• a liquid crystal layer is held between the paired substrates.

A liquid crystal display apparatus comprising

• thin film transistors, which are arranged in a vicinity of intersections of a plurality of scanning signal lines with a plurality of image signal lines, the scanning signal lines and the image signal lines being formed on one substrate of paired substrates so as to cross over each other, and gate electrodes, drain electrodes, and source electrodes of the thin film transistors being respectively connected to said scanning signal lines, said image signal lines, and pixel electrodes, the thin film transistors further including a laminate layer formed of an insulating layer and a semiconductor layer, the laminate layer being on the gate electrodes, wherein
• said insulating layer of the laminate layer has an end portion which is tapered, said gate electrodes having an end portion which is tapered,
• said insulating layer of the laminate layer is formed on said gate electrodes, and a taper ratio (B/A) of film thickness of the gate electrodes (B) to a planar projected distance from an end of a lower surface to an end of an upper surface of the gate electrodes (A) is equal to or less than three times of a taper ratio (B'/A') of said insulating layer thickness (B') to a planar projected distance from an end of a lower surface to an end of an upper surface of said insulating layer (A'), and
• a liquid crystal layer is held between the paired substrates.