Method for aligning micro patterns of a semiconductor device

A method for aligning micro patterns of a semiconductor device, comprising the steps of:

• preparing a semiconductor wafer provided with a plurality of dies and selected mark portions of overlay measuring marks;
• forming a first etchable layer serving to provide desired patterns, over the semiconductor wafer;
• forming, on portions of the first etchable layer respectively disposed over selected portions of the dies, first photoresist film patterns serving as an etch mask for the patterns which will be provided by the first etchable layer;
• selectively removing the first etchable layer by use of the first photoresist film patterns as a mask, thereby forming patterns of the first etchable layer which provide the remaining mark portions of the overlay measuring marks and alignment marks arranged on one side of the overlay measuring marks;
• removing the first photoresist film patterns;
• measuring the degree of misalignment for the selected dies by use of the overlay measuring marks which includes inner and outer marks provided by the selected and remaining mark portions;
• forming a second etchable layer over the entire upper surface of the resulting structure obtained after the removal of the first photoresist film patterns;
• forming second photoresist film patterns on portions of the second etchable layer disposed over normal portions of the dies other than the selected dies by use of the same light exposure mask as used in the formation of the first photoresist film patterns, under the condition in which a misalignment between the semiconductor wafer and the light exposure mask is corrected based on the measured degree of misalignment by a stepper stored with positions of the alignment marks in its working files;
• and
• etching the second etchable layer by use of the second photoresist film patterns as a mask, thereby forming patterns of the second etchable layer.