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US 5,665,650 AGranted
Method for manufacturing a high density electronic circuit assembly
AssigneeInternational Business Machines Corporation
InventorsJohn Matthew Lauffer, Donald Herman Glatzel, David John Russell
Life of this patent
Estimating the term…
Abstract
Photoimageable dielectric materials are coated on substrates, selectively exposed and developed, whereby small vias and interconnection openings are formed between adjacently spaced circuit layers. A conductive paste may be used to provide sequential layer interconnection and surface planarization. No adhesives are required in the manufacture of a circuit assembly having multiple circuit and dielectric layers, and the manufacturing method avoids the requirement for drilled through holes and blind vias.
Claims15
A method for manufacturing a high density electronic circuit assembly, comprising:
- coating at least one planar surface of a substrate member with a photoimageable dielectric material;
- exposing one or more portions of said photoimageable dielectric material coating to light, thereby forming defined exposed and unexposed areas of the photoimageable dielectric material coating on the surface of the substrate;
- developing said coated surface of the substrate and thereby removing the unexposed photoimageable dielectric material from the surface of the substrate and forming defined open surface areas on the substrate;
- partially curing the remaining exposed photoimageable dielectric material on the surface of the substrate;
- laminating a layer of an electrically conductive material with said dielectric material and said substrate member, said dielectric material being disposed between said layer of electrically conductive material and said substrate and said laminating being carried out at a temperature and for a length of time sufficient to complete the curing of said dielectric material;
- selectively etching said electrically conductive material and forming at least one first defined electrical circuit disposed on said dielectric material,
- applying an additional coating of a photoimageable dielectric material on said first defined electrical circuit and said cured dielectric material;
- exposing one or more portions of said additional coating of photoimageable dielectric material to light, thereby forming defined exposed and unexposed areas of photoimageable dielectric material wherein at least a portion of said unexposed areas are selectively aligned with one or more selected portions of the first electrical circuit and selected ones of the open areas on said substrate;
- developing said additional coating of photoimageable dielectric material and thereby removing the unexposed photoimageable dielectric material from the additional coating;
- curing the remaining exposed photoimageable dielectric material on the additional coating and thereby forming a selectively disposed second layer of dielectric material;
- selectively forming at least one additional electrical circuit, said additional electrical circuit being disposed on said additional layer of dielectric material, selected portions of the first defined electrical circuit, and selected ones of the open surface areas on said substrate member.
8 more elements
A method for forming a semiconductor chip attachment site on a previously formed electronic circuit board having at least one site defined thereon for the attachment of a semiconductor chip, comprising:
- coating the surface of the circuit board having the site defined thereon with a photoimage, able dielectric material;
- masking the portion of the photoimageable dielectric material coating which overlays said defined site;
- exposing the coating to a source of light whereby unmasked portions of the coating are exposed to the light and masked portions of the coating are unexposed to the light;
- developing said coating and thereby removing the unexposed portions of the coating wherein a void are formed in said coating at said defined site;
- filling said void with an electrically conductive paste;
- laminating a layer of an electrically conductive material over said dielectric material and said electrically conductive paste, said laminating being carried out at a temperature and for a length of time sufficient to cure said dielectric material and said electrically conductive paste;
- forming at least one electrical circuit by selectively etching the laminated layer of electrically conductive material, said electrical circuit having a planar surface land adapted for the direct connection of a semiconductor chip and aligned with the defined site on the underlying electrical circuit;
- applying a coating of a solder-resistant dielectric material to selected portions of said electrical circuit having said planar surface land, said planar surface land not being included in said selected portions and not being coated by said solder-resistant dielectric material;
- and
- conditioning said planar surface land for the direct attachment of a semiconductor chip.
7 more elements
Dependencies are inferred from the claim text.