Semiconductor device checking method
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsYoshiro Nakata, Shinichi Oki, Koichi Nagao, Kenzo Hatada, Shigeoki Mori, Takashi Sato, Kunio Sano
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Abstract
A plated layer made of a metal which is hard to oxidize is formed on the surface of a check electrode of a semiconductor chip which is formed on a semiconductor wafer. A bump of a contactor is caused to come in contact with the check electrode on which the plated layer is formed in the direction perpendicular to the semiconductor chip. Then, a voltage is applied to the bump of the contactor to make a check such as burn-in on the semiconductor chip in a lump.
Claims10
A method for checking a semiconductor device comprising:
- a first step of forming a check electrode on the main face of a semiconductor chip which is formed on a semiconductor wafer;
- a second step of forming a plated layer made of a metal which is hard to oxidize on the surface of said check electrode of said semiconductor chip;
- a third step of causing a probe terminal of a contactor to come in contact with said check electrode on which said plated layer is formed in the state where said probe terminal is not moved in parallel with the main face of said semiconductor chip;
- and
- a fourth step of applying a voltage to said probe terminal to check said semiconductor chip in the state where said probe terminal is in contact with said check electrode.
A method for checking a semiconductor device comprising:
- a first step of forming a check electrode on the main face of a semiconductor chip which is formed on a semiconductor wafer;
- a second step of forming a mat plated layer having an uneven surface on the surface of said check electrode of said semiconductor chip;
- a third step of causing a probe terminal of a contactor to come in contact with said check electrode on which said mat plated layer is formed in the state where said probe terminal is not moved in parallel with the main face of said semiconductor chip;
- and
- a fourth step of applying a voltage to said probe terminal to check said semiconductor chip in the state where said probe terminal is in contact with said check electrode.
Dependencies are inferred from the claim text.