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US 5,661,765 AGranted
Receiver and transmitter-receiver
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorFumio Ishizu
Life of this patent
Estimating the term…
Abstract
A receiver comprises a demodulator for demodulating a received signal, a clock recovery circuit for regenerating a clock phase-synchronized with a symbol clock component included in the received signal and a frequency offset compensating unit for controlling a variable division ratio of a variable divider constituting a phase-controlled loop of the clock recovery circuit so as to compensate for a frequency offset corresponding to a difference between a frequency of the symbol clock component included in the received signal and a free-running frequency of the clock recovery circuit. The receiver is constructed such that the compensation for the frequency offset is performed with operation timing different from that of the clock recovery circuit.
Claims26
A receiver comprising:
- demodulating means for demodulating a received signal;
- clock recovery means constituting a phase-controlled loop including a variable divider for dividing a reference clock signal, for generating a clock phase-synchronized with a symbol clock component included in the received signal demodulated by said demodulating means;
- frequency offset compensating means for controlling a division ratio of the variable divider so as to compensate for a frequency offset corresponding to a difference between a frequency of the symbol clock component included in the demodulated received signal and a free-running frequency of said clock recovery means;
- and
- wherein said compensation for the frequency offset is performed with operation timing different from that of said clock recovery means.
2 more elements
A receiver comprising:
- demodulating means for demodulating a received signal;
- clock recovery means constituting a phase-controlled loop including a variable divider for dividing a reference clock signal, for generating a clock phase-synchronized with a symbol clock component included in the received signal demodulated by said demodulating means;
- frequency offset compensating means for controlling a division ratio of the variable divider so as to compensate for a frequency offset corresponding to a difference between a frequency of the symbol clock component included in the demodulated received signal and a free-running frequency of said clock recovery means;
- and
- wherein said compensation for the frequency offset is performed with operation timing corresponding to a frame pulse or a slot pulse.
2 more elements
A receiver comprising:
- demodulating means for demodulating a received signal;
- clock recovery means for generating a clock phase-synchronized with a symbol clock component included in the received signal demodulated by said demodulating means;
- reference clock generating means including a variable divider, for dividing a frequency of a high-speed clock so as to produce a reference clock for said clock recovery means;
- frequency offset compensating means for controlling a division ratio of the variable divider so as to compensate for a frequency offset corresponding to a difference between a frequency of the symbol clock component include in the demodulated received signal and a free-running frequency of said clock recovery means;
- and
- wherein said compensation for the frequency offset is performed with operation timing different from that of said clock recovery means.
3 more elements
A receiver comprising:
- demodulating means for demodulating a received signal;
- clock recovery means constituting a phase-controlled loop including a first variable divider, for generating a clock phase-synchronized with a symbol clock component included in the received signal demodulated by said demodulating means;
- frequency offset compensating means for controlling a division ratio of the first variable divider so as to compensate for a frequency offset corresponding to a difference between a frequency of the symbol clock component included in the demodulated received signal and a free-running frequency of said clock recovery means with operation timing different from that of said clock recovery means;
- and
- control means having a second variable divider, for receiving a reference clock of said clock recovery means therein, for controlling and compensating a variable division ratio of the second variable divider based on frequency offset information of said frequency offset compensating means and for generating clocks for operating respective parts in said receiver and other devices concerned therewith and signals for controlling them.
2 more elements
A receiver comprising:
- demodulating means for demodulating a received signal;
- clock recovery means for generating a clock phase-synchronized with a symbol clock component included in the received signal demodulated by said demodulating means;
- reference clock generating means including a variable divider, for variably dividing a frequency of a high-speed clock so as to produce a reference clock for said clock recovery means;
- frequency offset compensating means for controlling a division ratio of the variable divider so as to compensate for a frequency offset corresponding to a difference between a frequency of the symbol clock component included in the demodulated received signal and a free-running frequency of said clock recovery means with operation timing different from that of said clock recovery means;
- and
- control means for receiving therein the reference clock whose frequency offset is compensated, from said clock recovery means so as to generate clocks for operating respective parts in said receiver and other devices concerned therewith and signals for controlling them.
3 more elements
A transmitter-receiver comprising:
- demodulating means for demodulating a received signal;
- clock recovery means constituting a phase-controlled loop including a first variable divider, for generating a clock phase-synchronized with a symbol clock component included in the received signal demodulated by said demodulating means;
- frequency offset compensating means for controlling a division ratio of the first variable divider so as to compensate for a frequency offset corresponding to a difference between a frequency of the symbol clock component included in the demodulated received signal and a free-running frequency of said clock recovery means with operation timing different from that of said clock recovery means;
- control means having a second variable divider, for receiving a reference clock of said clock recovery means therein, controlling and compensating a division ratio of the second variable divider based on frequency offset information of said frequency offset compensating means and generating clocks for operating respective parts in said transmitter-receiver and other devices concerned therewith and signals for controlling them;
- and
- wherein said compensation for the frequency offset is performed based on transmission timing information of said control means during a time interval other than a transmission time interval.
3 more elements
A transmitter-receiver comprising:
- demodulating means for demodulating a received signal;
- clock recovery means for generating a clock phase-synchronized with a symbol clock component included in the received signal demodulated by said demodulating means;
- reference clock generating means including a variable divider, for dividing a frequency of a high-speed clock so as to produce a reference clock for said clock recovery means;
- frequency offset compensating means for controlling a division ratio of the variable divider so as to compensate for a frequency offset corresponding to a difference between a frequency of the symbol clock component included in the demodulated received signal and a free-running frequency of said clock recovery means with operation timing different from that of said clock recovery means;
- control means for receiving therein the reference clock whose frequency offset is compensated, from said clock recovery means so as to generate clocks for operating respective parts in said transmitter-receiver and other devices concerned therewith and signals for controlling them;
- and
- wherein said compensation for the frequency offset is performed based on transmission timing information of said control means during a time interval other than a transmission time interval.
4 more elements
A transmitter-receiver comprising:
- demodulating means for demodulating a received signal;
- clock recovery means constituting a phase-controlled loop including a first variable divider, for generating a clock phase-synchronized with a symbol clock component included in the received signal demodulated by said demodulating means;
- frequency offset compensating means for controlling a division ratio of the first variable divider so as to compensate for a frequency offset corresponding to a difference between a frequency of the symbol clock component included in the demodulated received signal and a free-running frequency of said clock recovery means with operation timing different from that of said clock recovery means;
- control means having a second variable divider, for receiving a reference clock of said clock recovery means therein, controlling and compensating a division ratio of the second variable divider based on frequency offset information of said frequency offset compensating means and generating clocks for operating respective parts in said transmitter-receiver and other devices concerned therewith and signals for controlling them;
- and
- wherein said compensation for the frequency offset is performed with free-running timing until reception synchronization is made and being performed during a time interval other than a transmission time interval after the reception synchronization has been made.
3 more elements
A communication device comprising:
- a demodulator;
- a clock recovery circuit, said clock recovery circuit receiving a demodulated signal from said demodulator and generating a clock which is phase-synchronized with a symbol clock component included in the demodulated signal;
- a frequency offset measuring unit, said measuring unit generating frequency offset information comprising the difference between a frequency component of said symbol clock component and a free-running frequency of said clock recovery circuit;
- a frequency offset compensating unit, said compensating unit sending one of an advance signal and a retard signal to said clock recovery circuit in response to frequency offset information sent from said measuring unit.
1 more element
A method of compensating for frequency offset in a communications system, comprising the steps of:
- demodulating a received signal;
- generating a clock which is phase-synchronized with a symbol clock component included in the demodulated signal;
- measuring frequency offset information comprising the difference between a frequency component of said symbol clock component and a free-running frequency of a clock recovery circuit utilized in said generating step;
- sending one of an advance signal and a retard signal to said clock recovery circuit in response to frequency offset information sent from said measuring unit.
1 more element
Dependencies are inferred from the claim text.