Semiconductor device having metal silicide film
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsToshiaki Iwamatsu, Yasuo Inoue, Yasuo Yamaguchi, Tadashi Nishimura
Life of this patent
Estimating the term…
Abstract
A semiconductor device in which parasitic resistance of source/drain regions can be reduced than the parasitic resistance of the drain region, and manufacturing method thereof, can be obtained. In the semiconductor device, inactivating ions are implanted only to the source region of the semiconductor layer, so as to damage the crystal near the surface of the semiconductor layer, whereby siliciding reaction is promoted. Therefore, in the source region, a titanium silicide film which is thicker can be formed.
Claims20
A semiconductor device, comprising:
- a source region and a drain region spaced apart on a semiconductor substrate, sandwiching a channel region;
- a first silicide film having a first substantially uniform thickness formed on a surface of said drain region;
- and
- a second silicide film formed on a surface of said source region, made of same material as said first silicide film and having a second thickness across its entire length different from the first substantially uniform thickness of said first silicide film.
A semiconductor device, comprising:
- a source region and a drain region spaced apart in a semiconductor layer, sandwiching a channel region;
- a first silicide film having a first substantially uniform thickness formed on a surface of said drain region;
- and
- a second silicide film formed on a surface of said source region, made of same material as said first silicide film and having a second thickness across its entire length different from the first substantially uniform thickness of said first silicide film.
A semiconductor device, comprising:
- an element isolating insulating film formed in a semiconductor layer for surrounding an element forming region;
- a pair of source/drain regions formed in said element forming region, sandwiching a channel region;
- and
- a silicide film formed directly on surfaces of said source/drain regions, spaced by a prescribed distance from, and not extending above, said element isolating insulating film, wherein the silicide film is not formed at periphery regions of the source/drain regions and the periphery regions separate said element isolating insulating film from said silicide film.
A semiconductor device for storing information including a switching transistor and a capacitor, wherein
- said switching transistor includes
- a semiconductor layer having a main surface,
- a source region and a drain region spaced apart in said semiconductor layer, sandwiching a channel region,
- a first silicide film having a first substantially uniform thickness formed on a surface of said drain region, and
- a second silicide film formed on a surface of said source region, made of same material as said first silicide film and having a second thickness across its entire length different from the first substantially uniform thickness of said first silicide film.
A semiconductor device for inverting a logical NAND including more than one transistor, for outputting, when input levels to said more than one transistor are all at a first level, providing a second level, wherein
- at least one of said transistors includes
- a semiconductor layer having a main surface,
- a source region and a drain region spaced apart in said semiconductor layer, sandwiching a channel region,
- a first silicide film having a first substantially uniform thickness formed on a surface of said drain region, and
- a second silicide film formed on a surface of said source region, made of same material as said first silicide film and having a second thickness across its entire length larger than the first substantially uniform thickness of said first silicide film.
A semiconductor device for storing information by a memory cell including two transistors and two resistance elements, wherein
- at least one of said transistors includes
- a semiconductor layer having a main surface,
- a source region and a drain region spaced apart in said semiconductor layer, sandwiching a channel region,
- a first silicide film having a first substantially uniform thickness formed on a surface of said drain region, and
- a second silicide film formed on a surface of said source region, made of same material as said first silicide film and having a second thickness across its entire length larger than the first substantially uniform thickness of said first silicide film.
A semiconductor device including more than one transistor, wherein each of said transistors includes
- a source region and a drain region spaced apart in a semiconductor layer, sandwiching a channel region,
- a first silicide film having a first substantially uniform thickness formed on a surface of said drain region, and
- a second silicide film formed on a surface of said source region, made of same material as said first silicide film and having a second thickness across its entire length different from the first substantially uniform thickness of said first silicide film.
A semiconductor device including NMOS transistor and PMOS transistor which constitute CMOS inverter, comprising:
- an element isolating insulating film formed in a semiconductor layer for surrounding more than one element forming region;
- a pair of source/drain regions formed in each of said element forming regions, sandwiching a channel region;
- and
- a silicide film formed directly on surfaces of each pair of said source/drain regions, spaced by a prescribed distance from, and not extending above, said element isolating insulating film, wherein the silicide film is not formed at periphery regions of the source/drain regions and the periphery regions separate said element isolating insulating film from said silicide film.
Dependencies are inferred from the claim text.