Method for fabricating thin-film transistor with bottom-gate or dual-gate configuration

A method for fabricating a thin-film transistor, comprising:

• providing an insulating substrate;
• forming a first gate electrode on said substrate;
• forming a first gate dielectric layer covering said first gate electrode;
• subsequently forming a semiconductor layer and a conducting layer overlying said substrate as well as said first gate dielectric layer;
• forming a first dielectric layer on said conducting layer;
• subsequently polishing said first dielectric layer and conducting layer to expose said semiconductor layer disposed above said first gate electrode;
• subsequently forming a second gate dielectric layer and a second gate electrode on said exposed semiconductor layer;
• forming a second dielectric layer overlying said first dielectric layer and said second gate electrode;
• forming a pair of contact windows through said second and first dielectric layers to expose said conducting layer disposed at opposite sides of said first gate electrode;
• and
• forming a pair of source/drain electrodes to connect said exposed conducting layer via said contact windows, respectively.