Method for fabricating a stack of two dimensional circuit modules

A method for fabricating a stack of two dimensional circuit modules, the method comprising the steps of:

• providing a plurality of substrates having module interconnection layers, each of the substrates having a circuit chip with chip pads positioned therein and an electrically conductive feed-through line extending therethrough from a first surface of the substrate to a second surface of the substrate, the first surface being perpendicular to the second surface, each of the module interconnection layers being situated over a respective first surface of each of the substrates and comprising a module dielectric layer having module vias therein and a module pattern of electrical conductors extending through the module vias to couple the selected chip pads to the feed-through line;
• stacking the plurality of substrates;
• and
• applying a side interconnection layer over a side surface
• including the second surfaces of the substrates, the side interconnection layer comprising a side dielectric layer having side vias therein aligned with predetermined ones of the feed-through lines and a side pattern of electrical conductors extending through the side vias.