Variant frequency detector circuit
AssigneeFujitsu Limited
InventorsYasukuni Inagaki, Hitoshi Takahashi
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Abstract
A detector circuit for detecting abnormalities in the oscillation frequency of a clock signal, includes a counter and a comparator. The counter is supplied with a reference clock signal, and counts the number of pulses of the reference clock signal to output a signal indicative of the count value. In response to the clock signal, the counter clears the count value. The comparator compares the count value of the counter with a specified value stored in its register, and generates a detection signal indicating whether the frequency of the clock signal is within expected limits, based on the comparison result.
Claims14
A variant frequency detector circuit for detecting abnormalities in the frequency of a detected clock signal, comprising:
- a first counter, supplied with a reference clock signal, for counting the number of pulses of the reference clock signal and for outputting a signal indicative of the count value, said first counter being responsive to said detected clock signal for clearing the count value;
- a comparator provided with a memory circuit for storing a first specified value, said comparator comparing the count value of said first counter with said first specified value to generate a detection signal indicating whether the frequency of the detected clock signal is within expected limits;
- and
- a reference oscillator for generating the reference clock signal at a predetermined oscillation frequency,
- wherein said reference oscillator is coupled to a signal derived from the detection signal output from said comparator, and stops or restarts oscillating operation in response to said derived signal.
A variant frequency detector circuit for detecting abnormalities in the oscillation frequency of a detected clock signal, comprising:
- a reference oscillator for generating a reference clock signal, said reference oscillator including a frequency selector for storing data concerning the frequency of the reference clock signal and for controlling the frequency of the reference clock signal generated by said reference oscillator;
- a counter, coupled to said reference oscillator, for counting the number of pulses of said reference clock signal and for outputting a signal indicative of the count value, said first counter clearing the count value in response to said detected clock signal;
- and
- a comparator, coupled to said counter, for comparing the count value of said counter with a predetermined value, said comparator generating a detection signal indicating that the frequency of the detected clock signal is not within expected limits when the count value reaches to the predetermined value;
- wherein said reference oscillator is coupled to a signal derived from the detection signal output from said comparator, and stops and restarts oscillating operation in response to said derived signal.
A variant frequency detector circuit for detecting abnormalities in the frequency of a clock signal, comprising:
- a first counter supplied with a reference clock signal and a first clear signal, said first counter starting to count the number of pulses of said reference clock signal in response to an inactive first clear signal, and stopping the counting operation to clear the count value in response to an active first clear signal, wherein when the count value reaches a predetermined value, said first counter outputs a detection signal indicating that the frequency of the clock signal to be detected is not within expected limits;
- and
- a first clear signal generating circuit, supplied with said reference clock signal and a first pulse signal that is based on the clock signal to be detected, for generating the first clear signal, said first clear signal being active when a first edge of a pulse of said reference clock signal is synchronized with a trailing edge of a pulse of said first pulse signal.
Dependencies are inferred from the claim text.