Prober and tester with contact interface for integrated circuits-containing wafer held docked in a vertical plane
AssigneeElectroglas, Inc.
InventorsMichael P. C. Watts, Lawrence Hendler
Life of this patent
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AssigneeElectroglas, Inc.
InventorsMichael P. C. Watts, Lawrence Hendler
Estimating the term…
A tester for testing integrated circuits-containing semiconductor wafers or substrates, includes a vertically oriented performance board with. D/A converters mounted and pin connected immediately therebehind. A prober including a vertical array of connector pins mounts a vertical probe card and a vertically-mounted chuck on which a vertically-oriented wafer or substrate is held. One of the tester and prober are moved with respect to the other to dock and latch the tester and prober together. Simultaneously the array of connector pins is electrically connected to electrical connectors on the performance board and probe needles extending from a probe board on the probes are placed into test contact with contact pads on the integrated circuits on the wafer or substrate.
Apparatus for testing semiconductor wafers containing integrated circuits comprising:
Apparatus for testing semiconductor wafers containing integrated circuits comprising:
Apparatus for testing semiconductor wafers containing integrated circuits comprising:
Apparatus for testing semiconductor wafers containing integrated circuits comprising:
Apparatus for testing semiconductor wafers containing integrated circuits comprising:
Apparatus for testing semiconductor wafers containing integrated circuits comprising:
Apparatus for testing semiconductor wafers containing integrated circuits comprising:
A method for testing semiconductor wafers containing integrated circuits including contact pads comprising:
Dependencies are inferred from the claim text.