High density power device fabrication process using undercut oxide sidewalls

A method of making a recessed gate field effect power MOS device, the method comprising:

• forming a substrate including a first doped layer of a first dopant polarity defining a drain region and a second doped layer of a second dopant polarity opposite to the first dopant polarity defining a body region adjoining an upper surface of the substrate over the drain region;
• forming a lower oxide layer atop the second doped layer;
• forming a trenching protective layer including a lower polysilicon layer on the lower oxide layer, an intermediate oxide layer, and an upper polysilicon layer on the intermediate oxide layer;
• masking and patterning the trenching protective layer to define an exposed first area and a protected second area of the lower oxide layer on the upper surface of the substrate demarcated by opposite sides of the trenching protective layer in which opposite sides of the lower polysilicon layer and upwardly adjacent sides of the intermediate oxide layer are exposed;
• forming undercut oxide sidewalls having inner surfaces contacting the sides of the lower polysilicon layer of the trenching protective layer and outer surfaces spaced from the sides of the lower polysilicon layer to define a thickness of the undercut oxide sidewalls, the sides of the lower polysilicon layer being spaced inward from the upwardly adjacent sides of the intermediate oxide layer by a spacing greater than the thickness of the undercut oxide sidewalls;
• etching through the lower oxide layer to expose the upper surface of the substrate in the exposed first area and to form a pair of opposed rims along an intersection of each of the undercut oxide sidewalls and the lower oxide layer, each rim protruding laterally from the outer surface of the undercut oxide sidewall above the upper surface of the substrate;
• forming in the upper surface of the substrate, between the opposed rims first trench having sidewalls aligned relative to the outer edges of the opposed rims and extending at least through the second layer defining the body region to a bottom wall spaced to a depth from the upper surface of the substrate;
• forming a gate oxide layer on each of the sidewalls of the first trench;
• filling the first trench with polysilicon to a level adjoining the opposed rims;
• applying a protective layer over the polysilicon filled into the first trench, between the undercut oxide sidewalls and in contact with the outer surfaces of the undercut oxide sidewalls;
• removing the trenching protective layer and the lower oxide layer in the protected second area to expose a second area of the upper surface of the substrate between the inner surfaces of the undercut sidewalls;
• doping the second area of the upper surface of the substrate adjoining the gate oxide layer on each of the sidewalls of the first trench with dopant of said second dopant polarity to form a source region atop the body region;
• forming, in the second area of the substrate spaced from the inner surfaces of the undercut oxide sidewalls, a second trench having sidewalls spaced from the inner surfaces of the undercut oxide sidewalls and extending through the source region to a bottom wall in the body region;
• and
• depositing a source conductive layer in the second trench in contact with the source region and the body region;
• the second trench through the source region and the body region defining vertically-oriented source and body layers stacked along the gate oxide layer on opposite sidewalls of the second trench and having a lateral thickness established by the spacing of the inner and outer surfaces of the undercut oxide sidewalls and rims.