Method of bonding wafers having vias including conductive material
AssigneeHarris Corporation
InventorStephen Joseph Gaul
Life of this patent
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Abstract
A surface mountable integrated circuit and a method of manufacture are disclosed. A wafer 110 has a die with an integrated circuit 119 in one surface of the wafer. A via 130 extends to the opposite surface. The via has a sidewall oxide 131 and is filled with a conductive material such as metal or doped polysilicon. The metal may comprise a barrier layer and an adhesion layer. The second end of the via can be fashioned as a prong 233 or a receptacle 430. Dies with vias can be stacked on top of each other or surface mounted to printed circuit boards or other substrate.
Claims17
A method for fabricating surface mountable integrated circuits comprising the steps of:
- providing a device wafer of monocrystalline silicon material with first and second surfaces and with integrated circuits formed on the first surface of said device wafer;
- forming an oxide layer between the second surface of the device wafer and a handle wafer, said oxide layer bonding the handle wafer to the device wafer for supporting the device wafer;
- forming a via in the device wafer, said via comprising a first open end on the first surface of the device wafer, an elongated passage extending from said open end a controlled depth into the handle wafer and terminating at a second end closed by said handle wafer;
- depositing a conductive material in the via over the elongated surface and the closed end of the via;
- removing the handle wafer to expose the conductive material coated on the via surface.
Dependencies are inferred from the claim text.