US 5,644,308 A · Algorithmic analog-to-digital converter having redundancy and digital calibration

Abstract

An algorithmic converter system includes an algorithmic converter having a loop gain substantially less than two for converting an analog input signal to a redundant digital code; and a digital computation unit for converting the redundant digital code to a digital output signal by computing a polynomial of a radix, said radix being substantially equal to the loop gain, wherein the redundant digital code specifies coefficients of the polynomial. The redundancy extends the analog input conversion range with respect to the voltage reference of the algorithmic converter. Moreover, if the algorithmic converter has a maximum offset of V.sub.offmax, a reference voltage of V.sub.ref, and a loop gain less than 2/(1+V.sub.offmax /V.sub.ref), then loop offset will not cause differential nonlinearities. Nonlinearity is further reduced by digitally compensating for variations in the loop gain. The method includes measuring the loop gain of said algorithmic converter, and setting the radix of the computation unit equal to the measured value of the loop gain. Preferably the loop gain is measured by converting two reference voltages to obtain two sets of digits from the algorithmic converter, and employing a successive approximation technique that alternately computes an offset value and adjusts the radix. For the redundant signed digit (RSD) algorithmic converter, rapid convergence is obtained using a zero reference voltage and a non-zero reference voltage. For a conventional restoring (CR) algorithmic converter, however, positive and negative reference voltages are used.

Claims48

Dependent claims

A method of converting an analog input signal to a digital output signal comprising the steps of:

a) operating an algorithmic converter having a loop gain substantially less than two to convert said analog input signal to a redundant digital code;
and
b) operating a digital computation unit to convert said redundant digital code to a digital output signal by computing a polynomial of a radix, said radix being substantially equal to said loop gain, wherein said redundant digital code specifies coefficients of said polynomial;
and
wherein said polynomial is computed by operating an adder/subtractor to accumulate powers of said radix in an accumulator register, and said redundant code specifies an accumulation operation performed for each power of said radix.

2 more elements

A successive-approximation method of adjusting gain and offset of a converter so that a first input reference value becomes converted to a first output reference value, and a second input reference value becomes converted to a second output reference value, wherein the gain and offset adjustments are not independent, said converter is responsive to a gain value for adjusting the gain of the converter, and said converter is responsive to an offset value for adjusting the offset of the converter, said method comprising the steps of:

(a) setting said gain value to an initial value;
(b) setting said offset value to an initial value corresponding to said first output reference value, and operating said converter to convert said first input reference value to a converted value to determine a new value for said offset value, and setting said offset value to said new value for said offset value;
and
(c) operating said converter to convert said second input reference value to a converted value, comparing said converted value to said second output reference value, and adjusting a bit of said gain value based on the comparing of said converted output value to said second output reference value;
wherein said steps (b) and (c) are repeated so that step (c) successively adjusts a series of consecutive bits of said gain value beginning with adjustment of a more significant bit and ending with adjustment of a less significant bit.

2 more elements