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US 5,636,369 AGranted
Fast pattern-detection machine and method
AssigneeDatron/Transco, Inc.
InventorJames D. Perren
Life of this patent
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AssigneeDatron/Transco, Inc.
InventorJames D. Perren
Estimating the term…
The invention is a state machine for the detection of a pre-specified pattern of m bits in a stream of bits where the stream of bits is examined in steps, each successive step consisting of the examination of the next successive set of n bits in the stream of bits. The state machine is mechanized by a look-up table. The current set of n bits is combined with a state number representing the current state of the machine to obtain an address for entry into the look-up table. The state number stored in the table at that address is the new state number representing the new state of the machine after the examination of the current set of n bits in the stream. The new state number is then combined with the next successive set of n bits to obtain the next new state number from the table. Thus each new state number becomes the current state number for combination with the next set of n bits to form the address for entry into the table. The process is continued until the state number indicates that the pre-specified pattern of m bits has been detected in the stream of bits.
A state machine for the detection of a pre-specified sequential pattern of bits in a serial stream of bits, the state machine processing the serial stream in steps of n bits at a time, each successive step processing the next successive set of n bits in the serial stream of bits, the state of the state machine being represented by a state number, which state number is replaced by a new state number in response to the processing of each set of n bits, and at least one state number representing the detection of the pre-specified sequential pattern of bits, the state machine comprising:
A process using a state machine for detecting a pre-specified sequential pattern of bits in a serial stream of bits, the state machine processing the serial stream in steps of n bits at a time, each successive step processing the next successive set of n bits in the serial stream of bits, the state of the state machine being represented by a state number, which state number is replaced by a new state number in response to the processing of each set of n bits, the state machine having a look-up table having an input address and an output and having numbers representing the new state numbers being stored in the table and at least one state number representing the detection of the pre-specified sequential pattern of bits, the process comprising:
Dependencies are inferred from the claim text.