Method for programming complex PLD having more than one function block type
AssigneeXilinx, Inc.
InventorsDavid A. Harrison, Joshua M. Silver, Soren T. Soe
Life of this patent
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Abstract
A method for programming programmable logic devices (PLDs) having multiple function block types to implement a logic function, whereby the logic function is mapped into one of the function block types before being mapped into the remaining function block types. In one embodiment, a PLD containing both "fast" function blocks (FFBs) and "high density" function blocks (HDFBs) are programmed such that the FFBs are programmed prior to the HDFBs. This method maximizes the overall speed of an implemented logic function.
Claims22
A method for configuring a programmable logic device to implement a logic function, the method comprising the steps of:
- identifying portions of said logic function which qualify for implementation in a first type of function block, wherein said first type of function block provides a first speed and density;
- splitting the qualified portions of said logic function into a plurality of sub-portions such that each sub-portion is implementable in said first type of function block;
- mapping said qualified portions of said logic function into said first type of function block until said first type of function block is fully utilized;
- and
- mapping unmapped qualified portions of said logic function into a second type of function block, wherein said second type of function block provides a second speed and density.
A method for configuring a programmable logic device to implement a logic function, the method comprising the steps of:
- identifying portions of said logic function which qualify for implementation in a first type of function block;
- splitting the qualified portions of said logic function into a plurality of sub-portions such that each sub-portion is implementable in said first type of function block;
- mapping said qualified portions of said logic function into said first type of function block until said first type of function block is fully utilized;
- and
- mapping unmapped qualified portions of said logic function into a second type of function block, wherein said first type of function block is a fast function block and said second type of function block is a high density function block.
A method for configuring a programmable logic device to implement a logic function, the method comprising the steps of:
- identifying portions of said logic function which qualify for implementation in a first type of function block;
- splitting the qualified portions of said logic function into a plurality of sub-portions such that each sub-portion is implementable in said first type of function block, wherein said splitting includes determining the number of product terms and the number of input signals in an equation of said logic function, wherein said splitting further includes determining the polarity of an equation of said logic function associated with a high density block;
- mapping said qualified portions of said logic function into said first type of function block until said first type of function block is fully utilized;
- and
- mapping unmapped qualified portions of said logic function into a second type of function block.
Dependencies are inferred from the claim text.