System and method for preserving instruction state-atomicity for translated program

A method for translating a first program code to a second program code and for executing the second program code while preserving instruction state-atomicity of the first program code, the first program code including first program code instructions of a first instruction set associated with a first computer system having a first architecture and a first state area including a first memory and a first register set of one or more registers and the second program code including second program code instructions of a second instruction set associated with a second computer system having a second state area corresponding to said first state area and including a second memory and second register set of one or more registers, said second computer system having a second architecture, said method comprising the steps of:

• translating the first code instructions to corresponding second code instructions in accordance with a pattern code identifying one or more of said second code instructions corresponding to one of said first code instructions;
• for each first code instruction, organizing the corresponding second code instructions into a granular instruction sequence having at least two groups, a first group including those second code instructions that perform data operations using temporary storage locations and can be aborted after execution and preserve state atomicity of said first program code, and a second group including second program code instructions that update said second state area, said second group including one or more instructions used to implement one or more special write instructions of said first instruction set;
• including, in said second program code instructions, a subsequence of instructions corresponding to a first of said special write instructions included in said first sequence of instructions, said first special write instruction performing a single write to a first location in said second state area, said subsequence requiring execution without interruption and without intervening conflicting write operations to said first location to preserve state atomicity of said first program code;
• executing the second program code in said second computer system on a first processor;
• determining the occurrence of each asynchronous event while performing said executing step;
• determining, while performing said executing step, conflicting write to said first memory location by a second processor in said second computer system, said first and second processors accessing said first memory location as a common portion of said second state area;
• aborting a granular instruction sequence to preserve first code instruction state-atomicity and first code instruction granularity if an asynchronous event interrupt occurs while executing the sequence before all instructions of the first group have been executed or, if the first group of instructions have been executed, before executing other instructions of the second group that is subject to a possible exception, thereby enabling subsequent asynchronous event processing;
• aborting, in response to determining a conflicting write, said subsequence of instructions included in granular instruction sequence if a conflicting write is made by another processor before completion of execution of said subsequence;
• aborting a granular instruction sequence that includes said subsequence if an asynchronous event interrupt occurs while attempting execution of said subsequence;
• and
• delaying, in response to determining an asynchronous event, the processing of said asynchronous event interrupt and completing a granular instruction sequence being executed if the asynchronous event interrupt occurs after execution of all state update instructions in said second group that are subject to possible exception.

A method for translating a first program code to a second program code and for executing the second program code while preserving instruction state-atomicity of the first program code, the first program code including first code instructions of a first instruction set associated with a first computer system having a first state area including a first memory and a first set of one or more registers, said first computer system having a first architecture, the second program code including second code instructions of a second instruction set associated with a second computer system having a second state area corresponding to said first state area and having a second memory and a second register set of one or more registers, said second computer system having a second architecture, said method comprising the steps of:

• translating the first code instructions to corresponding second code instructions in accordance with a pattern code identifying, for one of said first code instructions, one or more corresponding second code instructions included in said second program code;
• organizing the second code instructions for each first code instruction into a granular instruction sequence having at least two groups, a first group including those second code instructions that perform data operations using temporary storage locations and can be aborted after execution and preserve state atomicity of said first program code, and a second group including second program code instructions that update said second state area, said second group including one or more instructions used to implement one or more special write instructions of said first instruction set;
• including, in said second program code instructions, a subsequence of instructions corresponding to a special write instruction included in said first sequence of instructions, said special write instruction performing multiple write operations to said second state area, said subsequence of instructions requiring execution without interruption and without intervening conflicting write operations;
• executing in said second computer system said second program code;
• determining an asynchronous event while performing said executing step;
• aborting a granular instruction sequence to preserve first code instruction state-atomicity and first code instruction granularity if an asynchronous event interrupt occurs while executing the granular instruction sequence before all of the instructions of the first group have been executed or, if the instructions in the first group have been executed, before executing an instruction of the second group that is subject to a possible exception, thereby enabling subsequent asynchronous event processing;
• delaying, in response to said determining step, the processing of an asynchronous event interrupt and completing a granular instruction sequence being executed A) if said subsequence is included in the granular instruction sequence and if the asynchronous event interrupt occurs at most after a first write during execution of said instruction subsequence or B) if the asynchronous event interrupt occurs after execution of instructions in said second group that are subject to possible exception.

A method for translating a first program code to a second program code to facilitate preserving state atomicity of the first program code during execution of the second program code, the first program code including first code instructions of a first instruction set associated with a first computer system having a first architecture and first state area including a first memory and a first set of one or more registers, the second program code including second code instructions of a second instruction set associated with a second computer system having a second state area corresponding to the first state area and having a second memory and a second set of one or more registers, said second computer system having a second architecture, said method comprising the steps of:

• translating the first code instructions to corresponding second code instructions in accordance with a pattern code identifying one or more corresponding second code instructions included in said second program code for one of said first code instructions included in said first program code;
• organizing the corresponding second code instructions into a granular instruction sequence having in order at least two groups, a first group including those second code instructions that perform data operations using temporary storage locations and can be aborted after execution and preserve state atomicity of said first program code, and a second group including those second program code instructions that update said second state area, said second group including one or more instructions used to implement one or more special write instructions of said first instruction set;
• including, in said second program code instructions, a first subsequence of instructions corresponding to a first of said special write instructions included in said first sequence of instructions, said first special write instruction performing a single write to a first location in said second state area, said first subsequence requiring execution without interruption and without intervening conflicting write operations to said first location to preserve state atomicity of said first program code;
• including in said second program code instructions a second subsequence of instructions corresponding to a second of said special write instructions included in said first sequence of instructions, said second special write instruction performing multiple write operations to said second state area, said second subsequence requiring execution without interruption and without intervening conflicting write operations;
• structuring said first subsequence to abort and subsequently retry until successful execution of said first subsequence is completed if a conflicting write is made by said other processor before completion of execution of said first subsequence;
• structuring said first subsequence to fail if an asynchronous event interrupt occurs during attempted execution of said first subsequence,;
• and
• structuring said second subsequence for privileged noninterruptible execution thereby delaying the processing of an asynchronous event interrupt that occurs during execution of said second program code until after completion of the execution of said second subsequence.

A method for executing a second program code while preserving state atomicity of a first program code from which the second program code is translated, the first program code including first code instructions of a first instruction set associated with a first computer system having a first state area including a first memory and first set of one or more registers, said first computer system having a first architecture, the second program code including second code instructions of a second instruction set associated with a second computer system having a second state area corresponding to said first state area and including a second memory and a second set of one or more registers, said second computer system having a second architecture, the second code instructions for each of said first code instructions being organized into a granular instruction sequence having at least two groups, a first group including those second code instructions that perform data operations using temporary storage locations and can be aborted after execution and preserve state atomicity of said first program code, and a second group including one or more instructions used to implement one or more special write instructions of said first instruction set, a first of said special write instructions resulting in including a first subsequence of instructions in said second sequence for processing a single write to a first memory location, said first sequence requiring execution without interruption and without intervening conflicting writes to said first memory location, said special write instructions including a second special write instruction resulting in a second subsequence of instructions being included in said second sequence for processing multiple write operations, said second sequence requiring execution without any interruption, said method comprising the steps of:

• executing the second program code in said second computer system;
• determining the occurrence of an asynchronous event while performing said executing step;
• determining, while performing said executing step, a conflicting write to said first memory location;
• aborting and subsequently retrying a granular instruction sequence to preserve first code instruction state-atomicity and first code instruction granularity if an asynchronous event interrupt occurs during the execution of said granular instruction sequence before all instructions of the first group have been executed or, if the first group of instructions have been executed, before the execution of any instruction of the second group that is subject to a possible exception;
• aborting and subsequently retrying said first subsequence in a granular instruction sequence that includes said first subsequence if a conflicting write is made prior to completing execution of said first subsequence;
• aborting a granular instruction sequence that includes said first subsequence if an asynchronous event interrupt occurs during attempted execution of said first subsequence;
• and
• delaying the processing of an asynchronous event interrupt and completing a granular code instruction sequence being executed A) if said second subsequence is included in the granular sequence and if the asynchronous event interrupt occurs at most after a first write during execution of said second subsequence or B) if the asynchronous event interrupt occurs after execution of one of said special write instructions or after execution of instructions in said second group that are subject to possible exception.

A system for translating a first program code to a second program code and for executing the second program code preserving instruction state-atomicity of the first code, the first program code including first code instructions of a first instruction set associated with a first computer system having a first architecture and a first state area including a first memory and a first set of one or more registers, the second program code including second code instructions of a second instruction set associated with a second computer system having a second state area corresponding to said first state area and including a second memory and a second set of one or more registers, said second computer system having a second architecture, said system comprising:

• means for translating said first program code to said second program code using said first computer system having a first processor and a first memory system coupled to said first processor;
• means for translating said first program code to said second program code by translating each of said first code instructions to one or more second code instructions in accordance with a pattern code identifying one or more corresponding second code instructions included in said second program code for one of said first code instructions included in said first program code;
• means for organizing the corresponding second code instructions for said first code instruction into a granular instruction sequence having in order at least two groups, a first group including those second code instructions that perform data operations using temporary locations and can be aborted after execution and preserve state atomicity of said first program code, and a second group including one or more instructions used to implement one or more special write instructions of said first instruction set;
• means for including in said second program code a first subsequence of instructions corresponding to a first of said special write instructions included in said first sequence of instructions, said first special write instructions performing a single write to a first memory location, said first subsequence of instructions requiring execution without any interruptions of intervening conflicting write operations to said first memory location;
• means for including a second subsequence of instructions in said second program code corresponding to a second special write instruction, said second special write instructions performing multiple write operations, said second subsequence requiring execution without an interruption;
• means for executing the second program code in said second computer system, said second computer system having a plurality of processors and a memory and register state, a first and a second of said plurality of processors are coupled to said memory;
• means for determining during execution of said second program code an asynchronous event and a conflicting write to said first memory location by said first and second processors in said second computer system;
• means for aborting and subsequently retrying a granular instruction sequence to preserve first code instruction state-atomicity and first code instruction granularity if an asynchronous event interrupt occurs during the execution of said granular sequence before all instructions of the first group have been executed or, if the first group of instructions have been executed, before the execution of an instruction in the second group instruction that is subject to a possible exception, thereby enabling subsequent asynchronous event processing;
• means for aborting and subsequently retrying said first subsequence of instructions in a granular instruction sequence that includes said first subsequence if a conflicting write occurs before completing execution of said first subsequence;
• means for aborting a granular instruction sequence that includes said first subsequence for a retry if an asynchronous event interrupt occurs during attempted execution of said first subsequence;
• and
• means for delaying the processing of an asynchronous event interrupt and completing a granular instruction sequence being executed A) if said second subsequence is included in the granular instruction sequence and if the asynchronous event interrupt occurs at most after a first write during execution of said second subsequence or B) if the asynchronous event interrupt occurs after execution of all instructions in said second group that are subject to possible exception.

A system for translating a first program code to a second program code and for executing the second program code while preserving instruction state-atomicity of the first code, the first program code associated with a first computer system having a first architecture and a first state area including a first memory and a first set of one or more registers, and the second program code associated with a second computer system having a second architecture and a second state area corresponding to said first state area and having a second memory and second set of one or more registers, said system comprising:

• a first computer system having a first processor for translating the first program code to the second program code;
• means for translating instructions included in the first code to one or more corresponding instructions included in said second code instructions in accordance with a pattern code;
• means for organizing the corresponding instructions included in said second code program code into a granular instruction sequence having at least two groups, a first group including those second code instructions that perform data operations using temporary storage locations and can be aborted after execution and preserve state atomicity of said first program code, and a second group including second program code instructions that update said second state area, said second group including one or more special write instructions of said first instruction set;
• means for including a subsequence of instructions in said second program code corresponding to a special write instructions for processing a single write operation to a first memory location, said subsequence of instructions requiring execution without interruption and without intervening conflicting write operations to said first memory location;
• means for determining during execution of said second program code the occurrence of an asynchronous event and the occurrence of a conflicting write to said first memory location by said;
• means for aborting and subsequently retrying a granular instruction sequence to preserve first code instruction state-atomicity and first code instruction granularity if an asynchronous event interrupt occurs during the execution of said granular instruction sequence before all of the first group of instructions have been executed or, if the first group of instructions have been executed, before the execution of an instruction in the second group that is subject to a possible exception, thereby enabling subsequent asynchronous event processing;
• means for aborting and subsequently retrying execution of said subsequence of instructions in a granular instruction sequence that includes said subsequence if a conflicting write is made before completing execution of said subsequence;
• means for aborting a granular instruction sequence that includes said subsequence if an asynchronous event interrupt occurs during attempted execution of said subsequence;
• and
• means for delaying the processing of an asynchronous event interrupt and completing a granular instruction sequence being executed if the asynchronous event occurs after execution of instructions in said second group that are subject to possible exception.

A system for translating a first program code to a second program code and for executing the second program code in a manner that preserves instruction state-atomicity of the first code, the first program code associated with a first computer system having a first architecture and a first state area including a first memory and a first set of one or more registers, and the second program code associated with a second architecture and a second state area corresponding to the first state area and including a second memory and a second set of one or more registers, said system comprising:

• means for translating said first program code to the second program code in said second computer system;
• means for translating each successive instruction in the first program code to one or more instructions included in said second program code in accordance with a pattern code identifying one or more corresponding instructions in said second program for one of said instructions in said first program code;
• means for organizing corresponding instructions included in the second program code for each first code instruction into a granular instruction sequence having in order at least two groups, a first group including second code instructions that perform data operations using temporary storage locations and can be aborted after execution and preserve state atomicity of said first program code, and a second group including second program code instructions that perform updates to said second state area, said second group including one or more instructions used to implement one or more special write instructions of said first instruction set;
• means for including a subsequence of instructions in said second program code corresponding to one of said special write operations performing multiple write operations, said subsequence requiring execution without any interruption;
• means for determining during execution of said second program code the occurrence of an asynchronous event;
• means for aborting and subsequently retrying a granular instruction sequence to preserve first code instruction state atomicity and first code instruction granularity if an asynchronous event interrupt occurs during the execution of said granular instruction sequence before all of the first group of instructions have been executed or, if the first group of instructions have been executed, before the execution of an instruction in the second group that is subject to a possible exception, thereby enabling subsequent asynchronous event processing;
• means for delaying the processing of an asynchronous event interrupt and completing a granular instruction sequence being executed A) if said subsequence is included in the granular instruction sequence and if the asynchronous event interrupt occurs at most after a first write during execution of said subsequence or B) if the asynchronous event occurs after executing instructions in said second group that are subject to possible exception.

A system for translating a first program code to a second program code to facilitate preserving state atomicity of the first code when the second code is executed, the first program code associated with a first computer system having a first computer architecture, a first instruction set, and a first state area having a first memory and first set of one or more registers, and the second program code associated with a second computer system having a second computer architecture, a second instruction set, and a second state area corresponding to said first state area and having a second memory and second set of one or more registers, said system comprising:

• means for translating each successive instruction in the first program code to one or more instructions included in said second program code in accordance with a pattern code identifying one or more corresponding instructions included in said program code for one of the instructions included in the first program code;
• means for organizing the corresponding instructions included in the second program code for each instruction included in said first program code into a granular instruction sequence having at least two groups, a first group including those second code instructions that perform data operations using temporary storage and can be aborted after execution and preserve the state atomicity of said first program code, and a second group including instructions from said second program code that update said second state area, said second group including one or more instructions used to implement one or more special write instructions of said first instruction set;
• means for including a first subsequence of instructions in said second program code corresponding to a first of said special write instructions processing a single write to a first memory location, said first subsequence requiring execution without any interruptions and without any intervening conflicting write operations to said first memory location;
• and
• means for including a second subsequence of instructions in said second program code corresponding to a second of said special write operations for processing multiple write operations, said second subsequence requiring execution without an interruption;
• means for aborting said first subsequence and subsequently retrying to successfully complete execution of said first subsequence included in a granular instruction sequence if a conflicting write occurs prior to completing execution of said first subsequence;
• means for aborting a granular instruction sequence that includes said first subsequence for a retry if an asynchronous event interrupt occurs during attempted execution of said first subsequence;
• and
• means, included in said second computer system, for delaying the processing of an asynchronous event interrupt and completing a granular instruction sequence being executed A) if said second subsequence is included in the granular instruction sequence and if the asynchronous event interrupt occurs at most after a first write during execution of said second subsequence or B) if the asynchronous event occurs after execution of instructions in said second group that are subject to possible exception.

A system for executing a second program code while preserving state atomicity of a first program code from which the second program code is translated, the first program code associated with a first computer system having a first computer architecture, a first instruction set, and a first state area including a first memory and first set of one or more registers, and the second program code associated with a second computer system having a second computer architecture, a second instruction set, a second state area corresponding to said first state area, and a second memory and second set of one or more registers, each of the instructions of said second program code being organized into a granular instruction sequence having at least two groups, a first group including those second code instructions that perform data operations using temporary storage locations and can be aborted after execution and preserve state atomicity of said first program code, and a second group including instructions in said second program code that update said second state area, said second group including one or more instructions used to implement one or more special write instructions of said first instruction set, a first of said special write instructions processing a single write to a first memory location and causing a first subsequence of instructions to be included in said second program code, said first subsequence being executed without an interruption and without intervening conflicting write operations to said first memory location, and a second of said special write instructions performing multiple write operations and causing a second subsequence of instructions to be included in said second program code, said second subsequence requiring execution without an interruption, said system comprising:

• means for executing said second program code in said second computer system;
• means for determining the occurrence of an asynchronous event while performing said executing step;
• means for determining while performing said executing step the occurrence of a conflicting write to said first memory location;
• means for aborting and subsequently retrying a granular instruction sequence to preserve first code instruction state-atomicity and first code instruction granularity if an asynchronous event interrupt occurs during the sequence execution before all of the instruction of said first group have been executed or, if the first group of instructions have been executed, before the execution of an instruction in said second group that is subject to a possible exception;
• means for aborting said first subsequence and subsequently retrying until successful execution of said first subsequence is completed if a conflicting write occurs before completion of execution of said first subsequence;
• means for aborting a granular instruction sequence that includes said first subsequence if an asynchronous event interrupt occurs during attempted execution of said first subsequence;
• and
• means for delaying the processing of an asynchronous event interrupt and completing a granular instruction sequence being executed A) if said second subsequence is included in the granular instruction sequence and if the asynchronous event interrupt occurs at most after a first write during execution of said second subsequence or B) if the asynchronous event interrupt occurs after execution of one of said special write instruction or after execution of instructions in said second group that are subject to possible exception.

A method for translating a first program code to a second program code and for executing the second program code in a manner that preserves instruction state-atomicity of the first code, the first program code associated with a first computer system having a first computer architecture, a first instruction set, and a first state area including a first memory and a first set of one or more registers, and the second program code associated with a second computer system having a second computer architecture, a second instruction set, a second state area corresponding to said first state area, second memory and a second set of one or more registers, said method comprising the steps of:

• translating each instruction included in the first program code to one or more corresponding instructions included in the second program code in accordance with a pattern code identifying said corresponding instructions for one of said instructions in the first program code;
• organizing the corresponding instructions included in said second program code for each first code instruction into a granular instruction sequence having at least two groups, a first group including those second code instructions that perform data operations using temporary storage location and can be aborted after execution and preserve state atomicity of said first program code, and a second group including instructions of said second program code that update said second state area, said second group including two or more instructions used to implement one or more special write instructions of said first instruction set;
• including in said second instruction group a subsequence of instructions corresponding to a first of said special write instructions to perform an operation that must be processed as a whole without any intervening conflicting event;
• executing said second program code in said second computer system;
• determining, while performing said executing step, the occurrence of an intervening event that actually or possibly creates a conflict with memory atomicity of said first special write instruction;
• aborting and subsequently retrying execution of a granular instruction sequence to preserve first code instruction state-atomicity and first code instruction granularity if an asynchronous event interrupt occurs during the execution of said granular instruction sequence before all of the instructions of said first group have been executed or, if the first group of instructions have been executed, before the execution of an instruction in said second group that is subject to a possible exception, thereby enabling subsequent asynchronous event processing;
• aborting execution of a granular instruction sequence and retrying until successful execution is completed of said subsequence included in said granular instruction sequence if said first special write operation is a single write instruction and if a conflicting write is detected before completing execution of said subsequence;
• aborting a granular instruction sequence that includes said subsequence if said subsequence corresponds to a first special write instructions that is a single write instruction and if an asynchronous event interrupt is a possible conflict during attempted execution of said subsequence;
• and
• delaying processing an asynchronous event interrupt and completing a granular instruction sequence being executed A) if said first special write instruction is a multiple write instruction and said subsequence is included in the granular instruction sequence and if the asynchronous event interrupt occurs at most after a first of said multiple writes during execution of said instruction subsequence or B) if the asynchronous event interrupt occurs after execution of instructions in said second group that are subject to possible exception.

A system for translating a first program code to a second program code and for executing the second program code in a manner that preserves instruction state-atomicity of the first code, the first program code associated with a first computer system having a first computer architecture, a first instruction set, and a first state area including a first memory and a first set of one or more registers, and the second program code associated with a second computer system having a second computer architecture, a second instruction set, a second state area corresponding to said first state area, a second memory, and a second set of one or more registers, the system comprising:

• means for translating each instruction in the first program code to one or more instructions included in the second program code;
• means for organizing the instructions in said second program code corresponding to each instruction in said first program code into a granular instruction sequence having at least two groups, a first group including those second code instructions that perform data operations using temporary storage locations and can be aborted after execution and preserve state atomicity of said first program code, and a second group including instructions of said second program code that update said second state area, said second group including one or more instructions used to implement one or more special write instructions of said first instruction set;
• means for determining during execution of said second program code the occurrence of an intervening event that actually or possibly creates a conflict with memory atomicity of one of said first special write instruction;
• means for aborting and retrying a granular instruction sequence to preserve first program code instruction state-atomicity and first program code instruction granularity if an asynchronous event interrupt occurs during execution of said granular instruction sequence before all instructions of the first group have been executed or, if the first group of instructions have been executed, before the execution of an instruction of second group that is subject to a possible exception;
• means for aborting a subsequence of instructions corresponding to one of said special write instructions and subsequently retrying said subsequence until successful execution is completed if said subsequence is a single write instruction to a first memory location and if a conflicting write to said first memory location is detected before completing execution of said subsequence;
• means for aborting a granular second code instruction sequence that includes said subsequence if said subsequence is a single write instruction and if an asynchronous event interrupt occurs during attempted execution of said subsequence;
• and
• means for delaying the processing of an asynchronous event interrupt and completing a granular second code instruction sequence being executed A) if said subsequence performs multiple write operations and is included in the granular instruction sequence and if the asynchronous event interrupt occurs at most after a first of said multiple writes during execution of said subsequence or B) if the asynchronous event occurs after execution of all instructions in said second group that are subject to possible exception.