Method and apparatus for interleave/de-interleave addressing in data communication circuits
AssigneeMotorola, Inc.
InventorsRaymond P. Voith, Sujit Sudhaman
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Abstract
Interleaving/de-interleaving of data is achieved by storing and subsequently retrieving portions of the data from circular buffers (60,70). The circular buffers (60,70) are addressed such that each circular buffer corresponds to an index of data (B.sub.i). Thus, data (80) is written into a circular buffer (60,70) using a first modulo scheme and read using a second modulo scheme, where the second modulo scheme is based on the interleaving scheme. An index array (20) is used to point to the appropriate entry in the circular buffers(60,70) to ensure a proper interleave/de-interleave process.
Claims18
A method for interleave/de-interleave addressing comprising the steps of:
- a) obtaining an array index for a first memory operation;
- b) utilizing the array index to retrieve an address from an address array for the first memory operation;
- c) calculating array address boundaries based on the array index;
- d) incrementing the address to produce an incremented address;
- e) comparing the incremented address to the array address boundaries;
- f) storing the incremented address into the address array to produce a stored address when the incremented address compares favorably to the array address boundaries;
- g) storing one of the array address boundaries into the address array to produce the stored address when the incremented address compares unfavorably to the array address boundaries;
- h) calculating the array index for a second memory operation;
- and
- i) utilizing the array index to retrieve the stored address from the address array based on the second memory operation.
An interleave/de-interleave addressing circuit comprising:
- an index generator that generates a first index based on a first indexing pattern for a write operation and generates a second index based on a second indexing pattern for a read operation;
- first memory operably coupled to the index generator, wherein the first memory is addressed by either the first index or the second index to retrieve addressing data for the write operation or the read operation, respectively;
- a modulo incrementing block operably coupled to the first memory, wherein the modulo incrementing block receives the addressing data, increments the addressing data in a modulo fashion to produce next addressing data for the write operation, and wherein for a write operation the modulo incrementing block provides the next addressing data to the first memory such that the first memory overwrites the addressing data with the next addressing data at a location addressed by the first index;
- and
- second memory that writes data during the write operation and reads data during the read operation, wherein the second memory is addressed by the addressing data.
An interleave/de-interleave addressing circuit comprising:
- an index generator that generates a plurality of indexes based on a first indexing pattern for a first operation and generates the plurality of indexes based on a second indexing pattern for a second operation, wherein the plurality of indexes correspond to a number of index locations of data being stored and subsequently read;
- first memory operably coupled to the index generator, wherein the first memory provides addressing data when addressed by one of the plurality of indexes;
- a plurality of circular buffers corresponding to the number of index locations;
- and
- address generator operably coupled to the plurality of circular buffers and the first memory, wherein the address generator generates next addressing data based on the addressing data, wherein the address generator addresses an entry in one of the plurality of circular buffers based on the addressing data, and
- wherein the first memory overwrites the addressing data with the next addressing data subsequent to the first operation.
Dependencies are inferred from the claim text.