Apparatus and method for maintaining synchronism between a picture signal and a matrix scanned array

In a picture signal having frames, each frame being composed of a plurality of lines, each line having either video information and horizontal synchronizing components, or vertical synchronizing components, each vertical synchronizing component indicating the beginning of a frame, a circuit for producing vertical synchronizing components when a frame fails to contain the vertical synchronizing component comprising:

• a pointer circuit that stores a carryover pointer signal indicating the beginning of a previous frame, and wherein the pointer circuit provides an inhibit pointer signal;
• a selection circuit coupled to the pointer circuit and providing a current vertical synchronizing component if the frame contains the current vertical synchronizing component, or providing the carryover pointer signal as a replacement vertical synchronizing component if the current frame fails to contain the current vertical synchronizing component;
• and
• wherein the selection circuit includes a latch and a pass gate, the latch receiving the picture signal and producing a set signal in response to the current vertical synchronizing component, and being coupled to the pointer circuit to receive the inhibit pointer signal and produce a reset signal in response thereto, the pass gate being coupled to the latch and receiving the set and reset signals therefrom, and being coupled to the pointer circuit to receive the carryover pointer signal, the pass gate providing the replacement vertical synchronizing component as the current vertical synchronizing component when failing to receive the set signal.

A display apparatus for receiving a television signal having frames of video information and corresponding first and second synchronizing components comprising:

• a semiconductor substrate;
• a matrix of field emission display cells formed on the semiconductor substrate arranged in an array of M rows by N columns, the field emission display cells being individually addressable by M number of row signals and N number of column signals to selectively receive the video information of the television signal in response thereto;
• a first and second pointer circuits formed on the semiconductor substrate, the first pointer circuit sequentially providing the M row signals and a previous data signal for a previous frame of video information in the television signal in response to a first clocking signal and a data signal, and the second pointer circuit sequentially providing the N column signals in response to a second clocking signal, the second clocking signal having a second frequency higher than a first frequency of the first clocking signal;
• a first clock circuit formed on the semiconductor substrate and coupled to the second pointer circuit and receiving the first synchronizing component of the television signal and producing the second clocking signal in response thereto;
• a synchronizing detector circuit formed on the semiconductor substrate and coupled to the first pointer circuit, the synchronizing detector receiving the second synchronizing component of the television signal for a current frame of video information and produces the data signal in response thereto;
• and
• a synchronizing regenerator circuit formed on the semiconductor substrate and coupled to the synchronizing detector and first pointer circuits, the synchronizing regenerator circuit providing a substitute data signal if the synchronizing regenerator circuit fails to receive the data signal, the substitute data signal being based on the previous data signal.

A method of displaying information based on a picture signal having frames composed of a plurality of lines, each line having either video information and a first synchronizing component, or second synchronizing component, the second synchronizing component occurring at a predetermined time during the line and indicating the beginning of a frame, the method comprising the steps of:

• providing a matrix of display cells arranged in an array having a plurality of rows and a plurality of columns, the display cells being individually addressable by row and column signals so as to receive the video information in the picture signal in response thereto;
• providing a row pointer device;
• producing a first and second clocking signal in response to the first synchronizing component, the second clocking signal having a frequency greater than a frequency of the first clocking signal;
• detecting the second synchronism component in the picture signal;
• producing a data signal based on the second synchronizing component;
• providing a current frame of video information to the matrix of display cells;
• receiving the data signal;
• producing the row signals from the pointer device at a rate equal to the frequency of the first clocking signal to sequentially enable rows of display cells in the matrix of display cells after receiving the data signal;
• producing a substitute data signal based on a second synchronizing component from the pointer device based on a previous frame of video information if the data signal is not received;
• and
• producing the column signals at a rate equal to the first clocking signal to sequentially enable display cells in a given row to display information based on the video signal.

A television for receiving a picture signal having frames, each frame being composed of a plurality of lines, each line having either video information and a first synchronizing component, or a second synchronizing component, the second synchronizing component occurring at a predetermined time during the line and indicating the beginning of a frame, the television comprising:

• a receiver that receives the picture signal;
• a matrix of display cells coupled to the receiver and arranged in an array having a plurality of rows and a plurality of columns, the display cells being individually addressable by row and column signals to receive the video information in the picture signal in response thereto;
• a pointer device providing the row signals in response to a data signal, generating a start pointer signal at the predetermined time during each line, and storing a carryover pointer signal indicating the beginning of a previous frame;
• a synchronizing detector having a memory circuit and an analysis circuit, the memory circuit being coupled to the pointer device and receiving the picture signal and storing a plurality of samples of each line of the picture signal after receiving the start pointer signal, the samples of each line containing one of the video information and the second synchronizing component, the samples of the second synchronizing component having a predetermined value, and the analysis circuit being coupled to the memory circuit and outputing the samples of the picture signal as the second synchronizing component if the samples have substantially the same predetermined value;
• and
• a synchronizing regenerator circuit coupled to the synchronizing detector and pointer device and receiving the second synchronizing component and outputing a current second synchronizing component as the data signal to the first pointer device if a current frame contains the current second synchronizing component, or outputing the carryover pointer signal as a substitute data signal if the current frame fails to contain the current second synchronizing component.

A computer for displaying a picture signal having frames of video information and corresponding synchronism components comprising:

• a central processing unit that produces the picture signal;
• a memory coupled to the central processing unit;
• an input device for inputting commands to the central processing unit;
• a matrix of display cells coupled to the central processing unit and arranged in an array having a plurality of rows and a plurality of columns, the display cells being individually addressable by row and column signals to receive the video information in the picture signal in response thereto;
• a first pointer circuit coupled to the matrix of display cells, the first pointer circuit providing the row signals and a previous data signal for a previous frame of video information in response to a first clocking signal;
• a second pointer circuit, coupled to the matrix of display cells, the second pointer circuit providing the column signals in response to a second clocking signal, the second clocking signal having a second frequency higher than a first frequency of the first clocking signal;
• a first clock circuit coupled to the second pointer circuit that receives the synchronizing component and produces the second clocking signal in response thereto;
• a synchronizing detector circuit coupled to the first pointer circuit that receives the synchronizing component of the picture signal and produces the data signal in response thereto;
• and
• a synchronizing regenerator circuit coupled to the synchronizing detector and first pointer circuits and providing a substitute data signal if the synchronizing regenerator circuit fails to receive the data signal, the substitute data signal being based on the previous data signal.