Horizontal position compensation circuit
AssigneeNEC Corporation
InventorSeiki Onagawa
Life of this patent
Estimating the term…
Abstract
When a first video signal produced by computer graphics is displayed on a raster scan display together with another video signal which is not produced by computer graphics, horizontal position of the first video signal is automatically compensated, by comparing check points in a first test pattern produced by computer graphics and in a second test pattern which is not produced by computer graphics.
Claims14
A horizontal position compensation circuit for compensating horizontal position on a display of a first video signal produced by computer graphics in a host computer and displayed on a raster scanned display together with a second video signal which is not produced by computer graphics, comprising:
- a first frame buffer for storing said first video signal;
- a second frame buffer for storing said second video signal;
- a read address counter for producing an address signal to write in said second frame buffer and to read from said first frame buffer and said second frame buffer, said address signal being produced from timing pulses delivered from said host computer, said timing pulses including a clock pulse, a horizontal synchronizing pulse and a vertical synchronizing pulse;
- a write address counter for producing an address signal to write in said first frame buffer;
- a data selector for selecting, in an address range determined by said host computer, data read out from said second frame buffer as an output, while selecting data read out from said first buffer as said output in other address ranges;
- and
- means for adjusting the horizontal position of said first video signal and said second video signal by adjusting timing of said address signal from said write address counter based on an electronic circuit detecting alignment between a first test pattern and a second test pattern, so there is no gap between a first picture generated from said first video signal and a second picture generated from said second video signal displayed on a raster scanned display.
A horizontal position compensation circuit for compensating horizontal position on a display of a first video signal produced by computer graphics in a host computer and displayed on a raster scanned display together with a second video signal which is not produced by computer graphics, comprising:
- a first frame buffer for storing said first video signal;
- a second frame buffer for storing said second video signal;
- a read address counter for producing an address signal to write in said second frame buffer and to read from said first frame buffer and said second frame buffer, said address signal being produced from timing pulses delivered from said host computer, said timing pulses including a clock pulse, a horizontal synchronizing pulse and a vertical synchronizing pulse;
- a write address counter for producing an address signal to write in said first frame buffer;
- a data selector for selecting, in an address range determined by said host computer, data read out from said second frame buffer as an output, while selecting data read out from said first buffer as said output in other address ranges;
- and
- an error detector for detecting an interval between a first check point provided in a first test pattern and a second check point provided in a second test pattern output from said data selector.
Dependencies are inferred from the claim text.