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US 5,635,879 AGranted
Voltage controlled oscillator formed of two differential transconductors
AssigneeMarvell Technology Group, Ltd.
InventorsPantas Sutardja, Sehat Sutardja
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Abstract
A monolithic CMOS phase-lock loop (PLL) circuit provides a high frequency of operation suitable for RF applications. The PLL produces an output clock with high spectral purity and very low jitter. The output clock has a low static phase error relative to a reference input, making the PLL also useful for clock synchronizing applications, such as clock recovery elements in transmission/recycling channels. The PLL provides in-phase and quadrature signals from a VCO which has two differential transconductor stages having negative output conductance.
Claims8
A voltage controlled oscillator comprising:
- first and second differential transconductors;
- the first differential transconductor having a positive input, a negative input, a positive output, a negative output, and a voltage control input;
- and
- the second differential transconductor having a positive input coupled to the positive output of the first differential transconductor, having a negative input coupled to the negative output of the first differential transconductor, having a positive output coupled to the negative input of the first differential transconductor, having a negative output coupled to the positive input of the first differential transconductor, and having a voltage control input coupled to the voltage control input of the first differential transconductor,
- each differential transconductor having a negative output conductance.
2 more elements
Dependencies are inferred from the claim text.