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US 5,635,873 AGranted
Operational amplifier having dummy isolation stage
AssigneeDallas Semiconductor Corporation
InventorsMark L. Thrower, Michael D. Smith
Life of this patent
Estimating the term…
Abstract
An integrated circuit terminator for a SCSI bus with resistors made of laser-blowable fuses in an array and a reference voltage source made with a bandgap generator and a two stage amplifier including a dummy isolation stage for providing symmetrical mismatch currents.
Claims5
An amplifier, comprising:
- (a) a differential input stage having a plurality of transistors arranged in a cascode configuration;
- (b) an isolation stage coupled to said differential input stage, said isolation stage with first and second current sources in series and including at least one bipolar junction transistor;
- and
- (c) a dummy stage coupled to said differential input stage symmetrically with respect to said isolation stage, said dummy stage with third and fourth current sources in series, said third current source matching said first current source and said fourth current source matching said second current source, said dummy stage further including at least one bipolar junction transistor;
- (d) whereby current source mismatches within said isolation stage between said first current source and said third current source are replicated in said dummy stage and symmetrically applied to said differential input stage.
2 more elements
An amplifier comprising:
- a bias stage having at least one bipolar junction transistor;
- a dummy isolation stage having at least one bipolar junction transistor;
- a differential input stage having a plurality of transistors arranged in a cascode configuration;
- an isolation stage having at least one bipolar junction transistor;
- and
- an output stage,
- wherein each of the foregoing stages is connected sequentially, and wherein said dummy isolation stage and said isolation stage have matched mismatched currents.
4 more elements
An amplifier comprising:
- (a) a differential input pair;
- (b) an isolation stage coupled to said pair, said isolation stage with first and second current sources in series and with a field effect transistor;
- (c) a dummy stage coupled to said pair symmetrically with respect to said isolation stage, said dummy stage with third and fourth current sources in series, said third current source matching said first current source and said fourth current source matching said second current source, said dummy stage further with a field effect transistor;
- (d) an output stage comprising a field effect transistor;
- and
- (e) wherein said isolation stage including a bipolar transistor connected to drive said output field effect transistor;
- (f) whereby current source mismatches within said isolation stage between said first current source and said third current source are replicated in said dummy stage and symmetrically applied to said pair.
4 more elements
Dependencies are inferred from the claim text.