Power transistor current limiter

A limiter circuit for the maximum current passed from a power transistor to a load connected between a first output terminal of the transistor and a first supply voltage connection, comprising;

• a driver stage for said transistor, having an input terminal adapted to receive a control signal and an output terminal connected to the control terminal of said transistor;
• an error amplifier incorporating a current generator and having a first and a second input terminals and an output terminal connected to said driver stage;
• a circuit means of detecting the current being flowed through said load, having a first terminal connected to a second output terminal of said transistor and a second terminal connected to a second supply voltage connection;
• and
• a feedback circuit block having an input terminal connected to said control terminal of said transistor and an output terminal connected to the current generator internal of said error amplifier, said first input of said error amplifier being connected to said second supply voltage via a resistive element, and said second input of said error amplifier being connected to said first terminal of said detection circuit means;
• wherein said feedback circuit bock comprises a first circuit block, connected with its input terminal to said control terminal of said transistor and being effective to lower the gain of said transistor, in cascade with a second circuit block, comprising a current-driven current generator, connected with its output terminal to the internal current generator of the error amplifier to deliver a current which is a function of the current delivered by the first circuit block through a common terminal;
• wherein said first circuit block comprises a resistor;
• and
• wherein said driver stage comprises a driver circuit operated by said control signal and connected to the control terminal of an output transistor having one of its output terminals connected to said control terminal of said power transistor;
• and
• said error amplifier comprises a first and a second transistor coupled together at their respective control terminals, a first output terminal of said first transistor being shorted on a point between said control terminals of said first and said second transistors and a first output terminal of said second transistor being connected to the control terminal of an output Darlington, said output Darlington having an output terminal connected to said control terminal of said output transistor, and said first output terminals of said first and said second transistor being also connected to the output terminals of a current-mirror circuit which constitutes said internal current generator of the amplifier and has its input terminal connected to said first output terminal of said second circuit block.

A limiter circuit for the maximum current passed from a power transistor to a load connected between a first output terminal of the transistor and a first supply voltage connection, comprising:

• a driver stage for said transistor, having an input terminal adapted to receive a control signal and an output terminal connected to the control terminal of said transistor;
• an error amplifier incorporating a current generator and having a first and a second input terminals and an output terminal connected to said driver stage;
• a circuit means of detecting the current being flowed through said load, having a first terminal connected to a second output terminal of said transistor and a second terminal connected to a second supply voltage connection;
• and
• a feedback circuit block having an input terminal connected to said control terminal of said transistor and an output terminal connected to the current generator internal of said error amplifier, said first input of said error amplifier being connected to said second supply voltage via a resistive element, and said second input of said error amplifier being connected to said first terminal of said detection circuit means;
• wherein said feedback circuit block comprises a first circuit block, connected with its input terminal to said control terminal of said transistor and being effective to lower the gain of said transistor, in cascade with a second circuit block, comprising a current-driven current generator, connected with its output terminal to the internal current generator of the error amplifier to deliver a current which is a function of the current delivered by the first circuit block through a common terminal;
• wherein said first circuit block comprises a resistor;
• wherein said power transistor is a transistor of the bipolar type;
• said driver stage comprises a driver circuit operated by said control signal and connected to the control terminal of a first unipolar transistor having an output terminal connected to the base of said power transistor;
• and,
• said error amplifier comprises second and third unipolar transistors coupled at their respective control terminals, a first output terminal of said second unipolar transistor being shorted on a point between the control terminals of said second and said third unipolar transistors and a first output terminal of said third unipolar transistor being connected to the control terminal of a fourth unipolar transistor which has an output terminal connected to said output terminal of said first unipolar transistor, and said first output terminals of said second and said third unipolar transistors being also connected to the output terminals of a current-mirror circuit made up of unipolar components which constitutes said internal current generator of the amplifier and has its input terminal connected to said first output terminal of said power transistor.