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US 5,635,865 AGranted
Power driving circuit of a thin film transistor liquid crystal display
AssigneeSamsung Electronics Co., Ltd.
InventorsSeung-Hwan Moon, Kyoung-Hoon Shin
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Abstract
A power driving circuit of a thin film transistor liquid crystal display includes Darlington circuits for generating voltages corresponding to the gate driving voltages required in the displays. Analog switching circuits control the application of voltages used to form the Von and Voff driving waveforms, which have driving voltage levels generated from the Darlington circuits. The phasing of the driving waveforms is controlled by a phasing signal which is received by the analog switching circuits. The power driving circuit of the present invention consumes less power than conventional driving circuits.
Claims9
A power driving circuit of a thin film transistor liquid crystal display comprising:
- a first analog switching circuit and a second analog switching circuit, said first and second analog circuits both having means for receiving a phasing signal having a first state and a second state opposite said first state, said first analog switching circuit outputting a first control signals in response to said first state of said phasing signal, and said second analog switching circuit outputting a second control signal in response to said second state of said phasing signal;
- a first Darlington circuit which generates a first voltage having a first voltage level;
- a second Darlington circuit which generates a second voltage having a second voltage level;
- a first switching circuit which receives said first voltage level from said first Darlington circuit and which receives a third voltage having a third voltage level greater than said first voltage level from first power source, said first switching circuit being coupled to receive said first control signal from said first analog switching circuit and outputting a first power waveform having a high level corresponding to said third voltage level in response to said first control signal, and otherwise having a low level corresponding to said first voltage level;
- a second switching circuit which receives said second voltage level from said second Darlington circuit and which receives a fourth voltage having a fourth voltage level less than said second voltage level from a second power source, said second switching circuit being coupled to receive said second control signal from said second analog switching circuit and outputting a second power waveform having a high level corresponding to said second voltage level in response to said second control signal, and otherwise having a low level corresponding to said fourth voltage level;
- and
- a third switching circuit which receives a ground voltage having a ground voltage level and which receives a fifth voltage having a fifth voltage level from a third power source, said third switching circuit being coupled to receive said second control signal from said second analog switching circuit and outputting a third power waveform having a high level corresponding to said fifth voltage level in response to said second control signal and otherwise having a low level corresponding to said ground voltage level.
4 more elements
A power driving circuit of a thin film transistor liquid crystal display comprising:
- a first Darlington circuit which generates a first voltage having a first voltage level;
- a second Darlington circuit which generates a second voltage having a second voltage level, said first and second voltage levels corresponding to gate driving voltages required to drive thin film transistors of said thin film transistor liquid crystal display on and off, respectively;
- first means for receiving a phasing signal and for outputting a first control signal in correspondence with said phasing signal;
- second means for receiving said phasing signal and for outputting a second control signal in correspondence with said phasing signal;
- a first waveform generating circuit coupled to said first Darlington circuit and coupled to receive said first control signal from said first means and a third voltage having a third voltage level greater than said first voltage level from a first power source, said first waveform generating circuit outputting a first power waveform having high and low levels in correspondence with said first control signal, said high level corresponding to said third voltage level and said low level corresponding to said first voltage level;
- and
- a second waveform generating circuit coupled to said second Darlington circuit and coupled to receive said second control signal from said second means and a fourth voltage having a fourth voltage level less than said second voltage level from a second power source, said second waveform generating circuit outputting a second power waveform having high and low levels in correspondence with said second control signal, said high level corresponding to said second voltage level and said low level corresponding to said fourth voltage level.
4 more elements
Dependencies are inferred from the claim text.