Hermetically sealed semiconductor device
AssigneeTribotech
InventorEarl S. Cain
Life of this patent
Estimating the term…
Abstract
A semiconductor device which includes device bonding pads exposed through oxide windows formed in a passivation oxide layer providing electrical connections to the metallized regions, a bonding pad of a different material electrically connected to the device bonding pad through a barrier layer, and a protective layer overlying the edges of said passivation oxide layer in contact with the device to seal the edges of the protective layer and a seal formed at said windows whereby the device is protected against the environment without the necessity of a separate metal or ceramic housing.
Claims28
A semiconductor device which includes a semiconductor body comprising a section of a semiconductor wafer defined by dicing lines which divide said semiconductor wafer into a plurality of semiconductor bodies, said semiconductor body having circuit metallization carried by one or more insulating layers for connection to active regions of said device, and an oxide layer having inner edges defining windows overlying said circuit metallization to expose bonding pad areas of said metallization for connection to said active regions, said oxide layer having outer edges remote from said bonding pad areas, the improvement comprising
- a metal layer of a metal which acts as a barrier against migration of corrosion resistant metal formed on and covering said bonding pad areas,
- said outer edges of said insulating and oxide layers being spaced inwardly of said dicing lines,
- a protective layer extending over said outer edges of said insulating and oxide layers and in contact with the semiconductor body between said outer edges and said dicing lines to seal said outer edges of said insulating and oxide layers and environmentally protect said device, said protective layer having inner edges defining windows at said bonding pad areas, and
- a corrosion resistant metal layer formed on said metal layer for connecting to said bonding pad areas through said metal layer, said corrosion resistant metal layer extending over and sealing said inner edges of said protective layer.
A semiconductor device which includes a semiconductor body comprising a section of a semiconductor wafer defined by dicing lines which divide said semiconductor wafer into a plurality of semiconductor bodies, said semiconductor body having circuit metallization carried by one or more insulating layers for connection to active regions of said device, and an oxide layer having inner edges defining windows overlying said circuit metallization to expose bond pad areas of said metallization for connection to said active regions, said oxide layer and said insulating layers having outer edges remote from said bond pad areas, the improvement comprising
- aluminum bond pads on said metallization at said bond pad areas,
- a layer of a metal which acts as a barrier against migration of gold formed on and covering said aluminum bond pads,
- said outer edges of said insulating and oxide layers being spaced inwardly of said dicing lines,
- a protective layer having inner edges defining windows at said bond pad areas, said protective layer extending over said outer edges of said insulating and oxide layers and contacting the semiconductor body between said outer edges and said dicing lines to seal said outer edges of said insulating and oxide layers and environmentally protect said device,
- sealing means for sealing said inner edges of said oxide layer to environmentally protect said device, and
- a gold layer formed on said metal layer for connecting to said aluminum bond pads through said metal layer, said gold layer extending over said sealing means for sealing said metal layer.
A semiconductor device which includes a semiconductor body comprising a section of a semiconductor wafer defined by dicing lines which divide said semiconductor wafer into a plurality of semiconductor bodies, said semiconductor body having circuit metallization carried by one or more insulating layers for connection to active regions of said device, and an oxide layer having inner edges defining windows overlying said circuit metallization to expose bond pad areas of said metallization for connection to said active regions, said oxide layer and said insulating layers having outer edges remote from said bond pad areas, the improvement comprising
- a first metal layer of a metal which acts as a barrier against migration of gold formed on and covering said bond pad areas,
- said outer edges of said insulating and oxide layers being spaced inwardly of said dicing lines,
- a protective layer extending over said outer edges of said insulating and oxide layers and in contact with the semiconductor body between said outer edges and said dicing lines to seal said outer edges of said insulating and oxide layers and environmentally protect said device, said protective layer having inner edges defining windows at said bond pad areas,
- a gold layer formed on said first metal layer for connecting to said bond pad areas through said first metal layer, said gold layer extending over and sealing said inner edges of said protective layer,
- a second metal layer which acts as a barrier against migration of solder covering said gold layer, and
- a solder bond pad formed on said second metal layer.
Dependencies are inferred from the claim text.