MOS gate type semiconductor device

A MOS gate type semiconductor device, comprising:

• a semiconductor substrate on a surface of which a source region and a drain region are formed;
• an upper source wiring provided on the semiconductor substrate consisting of a plurality of upper source electrodes formed in a comb-like arrangement;
• an upper drain wiring provided on the semiconductor substrate and consisting of a plurality of upper drain electrodes formed in a comb-like arrangement such that the plurality of upper drain electrodes are engaged with the upper source electrodes;
• lower source electrodes provided at each of lower portions of adjacent pairs of the upper source electrodes and the upper drain electrodes such that the lower source electrodes are layered below the upper source electrodes and the upper drain electrodes;
• and
• lower drain electrodes provided at each of lower portions of adjacent pairs of the upper source electrodes and the upper drain electrodes such that the lower drain electrodes are layered below the upper source electrodes and the upper drain electrodes,
• wherein the lower source electrodes are connected to the upper source electrodes and the source region, and are disposed so as to form a wave-like shape extending in a lengthwise direction of the upper source electrodes, and
• the lower drain electrodes are connected to the upper drain electrodes and the drain region, and are disposed so as to form a wave-like shape extending in a lengthwise direction of the upper drain electrodes, in parallel with the lower source electrodes.

A MOS gate type semiconductor device, comprising:

• a semiconductor substrate on a surface of which a source region and a drain region are formed;
• an upper source wiring provided on the semiconductor substrate consisting of a plurality of upper source electrodes formed in a comb-like arrangement;
• an upper drain wiring provided on the semiconductor substrate consisting of a plurality of upper drain electrodes formed in a comb-like arrangement such that the plurality of upper drain electrodes are engaged with the upper source electrodes;
• lower source electrodes provided at each of lower portions of adjacent pairs of the upper source electrodes and the upper drain electrodes such that the lower source electrodes are layered below the upper source electrodes and the upper drain electrodes;
• and
• lower drain electrodes provided at each of lower portions of adjacent pairs of the upper source electrodes and the upper drain electrodes such that the lower drain electrodes are layered below the upper source electrodes and the upper drain electrodes,
• wherein the lower source electrodes are connected to the upper source electrodes and the source region, and have a lengthwise direction oblique to a lengthwise direction of the upper source electrodes, and
• the lower drain electrodes are connected to the upper drain electrodes and the drain region, and are formed to be disposed alternately in parallel with the lower source electrodes.