Splitting a floating-point stack-exchange instruction for merging into surrounding instructions by operand translation

A method for processing an exchange instruction, the exchange instruction for exchanging the contents of an exchange-destination register with the contents of an exchange-source register, the method comprising:

• processing a preceding instruction that occurs before the exchange instruction in an instruction stream, when the preceding instruction is a stack-based instruction that writes a result to the stack-top, the preceding instruction having a first destination-register specifier which is a current stack-top register;
• replacing the first destination-register specifier for the preceding instruction with an exchange-source specifier that specifies the exchange-source register, wherein the preceding instruction writes the result to the exchange-source register instead of the current stack-top register;
• processing a following instruction that occurs after the exchange instruction in the instruction stream, when the following instruction is a stack-based instruction that reads a source operand from the stack-top, the following instruction having a first source-register specifier which is the current stack-top register;
• replacing a second source-register specifier of the following instruction with the exchange-source specifier, wherein the following instruction reads the source operand from the exchange-source register instead of a second source register;
• and
• removing the exchange instruction from further processing by a processor when the first destination-register specifier is replaced with the exchange-source specifier and the second source-register specifier is replaced with the exchange-source specifier,
• whereby a first half of the exchange instruction is processed by the preceding instruction and a second half of the exchange instruction is processed by the following instruction.

A translator circuit for a processor, the translator circuit for translating stack-based instructions into random-access-register-based instructions, the translator circuit for further translating stack-based instructions to process a portion of a register-exchange instruction, the translator circuit comprising:

• a plurality of registers, each register for storing an operand or a result;
• a top-of-stack pointer register containing a pointer identifying a stack-top register in the plurality of registers;
• incrementing means for incrementing the pointer to the stack-top register, the pointer pointing to a different one of the registers in the plurality of registers after being incremented;
• exchange-source means for receiving an exchange-source position identifying a position relative to the stack-top register of an exchange-source for the register-exchange instruction, wherein a destination of the register-exchange instruction is the stack-top register;
• destination adder means, receiving the exchange-source position from the exchange-source means, and receiving the pointer to the stack-top register, for adding the exchange-source position to the pointer and outputting a sum as a first output when the register-exchange instruction and a preceding instruction are simultaneously being processed by the translator circuit, and when the preceding instruction specifies that a result be written to the stack-top register, the destination adder means otherwise outputting the pointer to the stack-top register as the first output;
• and
• destination-specifier means, receiving the first output from the destination adder means, for identifying one of the registers in the plurality registers as a destination o,
• wherein the destination register of the preceding instruction is translated from the stack-top register to the exchange-source register when the register-exchange instruction and the preceding instruction are simultaneously being processed by the translator circuit.