Encoding assertion and de-assertion of interrupt requests and DMA requests in a serial bus I/O system

A computing system comprising:

• a first peripheral device;
• a first I/O device, the first device including
• a first request pin coupled to the first peripheral device,
• a serial out port, and
• a serializer, coupled to the first request pin and to the serial out port, the serializer forwarding a first packet to the serial out port when the first peripheral device asserts a first request signal on the first request pin, and the serializer forwarding a second packet to the serial out port when the first peripheral device de-asserts the first request signal on the first request pin;
• and,
• a controller device, including
• a first request controller,
• a serial in port coupled to the serial out port of the first I/O device, the first packet and the second packet being forwarded from the serial out port of the first I/O device to the serial in port, and
• an unserializer coupled to the first request controller and to the serial in port,
• the unserializer asserting an emulated first request signal coupled to the first request controller upon receiving from the serial in port the first packet, and
• the unserializer de-asserting the emulated first request signal coupled to the first request controller upon receiving from the serial in port the second packet.

A method for emulating request signals comprising the steps off

• (a) when a first peripheral device asserts a first request signal on a first request pin of a first I/O device, performing the following substeps
• (a.1) generating, by a serializer coupled to the first request pin, a first packet, the serializer forwarding the first packet to a serial out port of the first I/O device,
• (a.2) forwarding the first packet, by the serial out port of the first I/O device, to a serial in port of a controller device, and
• (a.3) upon the serial in port receiving the first packet, asserting, by an unserializer within the request controller, an emulated first request signal, the emulated first request signal being coupled to a first request controller within the controller device;
• and,
• (b) when the first peripheral device de-asserts the first request signal on the first request pin of the first I/O device, performing the following substeps
• (b.1) generating, by the serializer coupled to the first request pin, a second packet, the serializer forwarding the second packet to the serial out port of the first I/0 device,
• (b.2) forwarding the second packet, by the serial out port of the first I/O device, to the serial in port of the controller device, and
• (b.3) upon the serial in port receiving the second packet, deasserting, by the unserializer within the request controller, the emulated first request signal.

A computing system comprising:

• a serial bus comprising a plurality of serial bus connections;
• a first plurality of I/O devices arranged in a daisy chain and coupled together by the serial bus connections, each I/O device including
• a first request pin coupled to a peripheral device,
• a serial out port coupled to a serial bus connection from the plurality of serial bus corrections,
• a serial in port coupled to a serial bus connection from the plurality of serial bus connections, and
• a serializer, coupled to the first request pin and to the serial out port, the serializer forwarding a first packet to the serial out port when the peripheral device asserts a first request signal on the first request pin, and the serializer forwarding a second packet to the serial out port when the peripheral device de-asserts the first request signal on the first request pin;
• and,
• a controller device, including
• a first request controller,
• a serial in port coupled to a serial bus connection from the plurality of serial bus connections, for receiving the first packet and the second packet from each of the I/O devices, and
• an unserializer coupled to the first request controller and to the serial in port,
• the unserializer asserting an emulated first request signal coupled to the first request controller upon receiving from the serial in port the first packet, and
• the unserializer de-asserting the emulated first request signal coupled to the first request controller upon receiving from the serial in port the second packet.