Method for executing branch instructions by processing loop end conditions in a second processor

A method for executing a program utilizing a main processor, a co-processor, a general purpose register and a loop control means for processing loops of instructions including a branch instruction which specifies a loop index, an increment and a branch address and determines whether the loop has to be repeated or exited, said method comprising the steps of:

• said main processor generating current addresses of said instructions and said co-processor concurrently executing said instructions;
• separately storing address data of said index and said increment during a loop execution;
• storing said branch address and an address of the branch instruction when during processing of a loop said branch instruction is first time executed;
• storing a branch condition if during a first execution of the loop the branch instruction indicated that a branch condition is fulfilled, and maintaining said branch condition stored during all loop execution cycles until said loop control means indicates that the branch condition is no longer fulfilled;
• updating said index while said loop is executed a next time in said co-processor, said generating at an end of said next loop execution a successful branch condition indication if the branch condition is still fulfilled, said successful branch condition indication confirming storage of said branch condition for a next loop cycle;
• repeating step (e) as long as the branch condition is fulfilled;
• comparing said branch instruction address and said current instruction address to determine when during execution of the loop said branch address has been reached;
• and
• replacing said current instruction address by said branch address if step (g) resulted in a match and step (e) or (f) resulted in a branch condition, thereby suppressing the execution of said branch instruction until the branch condition ceases to be fulfilled;
• calculating an index value for the branch instruction;
• comparing the calculated index value with a branch condition value;
• setting a successful branch indicator latch if the branch condition value is equal to the calculated index value;
• executing again the loop instructions if the successful branch indicator latch is set, otherwise jumping to a next instruction outside the loop to be executed;
• and
• retrieving from an index register a previous value of the index value and adding to the previous value a value given in the branch instruction;
• and
• wherein said branch instruction is a branch or index low or equal instruction.

A computer system including main processor for performing address modification, a co-processor for executing loop instructions and a general purpose register, said system comprising:

• loop control means for processing loops of instructions including a branch instruction which specifies a loop index, an increment and a branch address and determines whether the loop has to be repeated or exited;
• instruction address modifier means for generating a current instruction address during execution of a loop;
• first register means for storing address data of said index and said increment during the loop execution;
• second register means for storing said branch address and an address of the branch instruction when during a loop processing said branch instruction is first time executed;
• branch latch means which are set if during a first execution of the loop the branch instruction determined that the branch condition is fulfilled, where said branch latch means remains set during all loop execution cycles until said loop control means indicates that the branch condition is no longer fulfilled;
• means for updating said index while the loop is executed in the co-processor, and generating at an end of a loop execution a successful branch condition signal if the branch condition is still fulfilled, said successful branch condition signal confirms the set status of said branch latch means;
• means for comparing said branch instruction address and said current instruction address to indicate that during execution of the loop said branch address has been reached;
• and
• multiplexer means controlled by a match output of said comparing means, by the set status of said latch means and by said successful branch condition signal for replacing said current instruction address by said branch target address from said second register means and thereby suppressing the execution of said branch instruction until the branch condition ceases to be fulfilled;
• and
• wherein said first register means comprises a supplementary register for storing numbers of registers for said branch instruction, one of said registers containing an index and the other of said registers containing an increment.

A method for processing loops of instructions including a branch instruction which specifies a loop index, an increment and a branch instruction address, said method comprising the steps of:

• (a) in a first processor, generating a current instruction address during execution of a loop;
• (b) separately storing address data of the index and the increment during execution of said loop;
• (c) storing the branch instruction address and a branch target address when during loop processing said branch instruction is executed a first time;
• (d) storing a branch condition if during a first execution of the loop the branch instruction indicates that a branch condition is fulfilled, and maintaining said stored branch condition during other execution(s) of said loop until the branch condition is no longer fulfilled;
• (e) in a second processor, executing said loop a next time and concurrently modifying the current instruction address and evaluating the branch condition in said first processor by calculating an index value for the branch instruction using said separately stored address data and said separately stored increment and by comparing the calculated index value with a value of the branch condition and generating a successful branch condition indication if the branch condition value is equal to the calculated index value;
• (f) repeating step (e) as long as the branch condition is fulfilled, and otherwise addressing and executing in said first processor a next instruction outside of the loop;
• (g) during each performance of step (e), accessing the stored branch instruction address and comparing it with the modified current instruction address to determine when during execution of the loop said branch instruction address has been reached;
• and
• (h) replacing said current instruction address by said branch target address if step (g) resulted in a match and step (e) resulted in a successful branch condition, thereby suppressing execution of said branch instruction in said first processor until the branch condition ceases to be fulfilled.

A first processor for processing loops of instructions including a branch instruction which specifies a loop index, an increment and a branch instruction address, said first processor comprising:

• means for generating a current instruction address during execution of a loop;
• first register means for separately storing address data of the index and said increment during execution of said loop;
• second register means for storing the branch instruction address and a branch target address when during loop processing said branch instruction is executed a first time;
• latch means for storing a branch condition if during a first execution of the loop the branch instruction indicates that the branch condition is fulfilled, and maintaining said stored branch condition during other execution(s) of said loop until said loop control means indicates that the branch condition is no longer fulfilled;
• means for modifying the current instruction address and evaluating the branch condition while said loop is executed a next time in a second processor, by calculating an index value for the branch instruction using the contents of said first register means, said separately stored address data and said separately stored increment and by comparing the calculated index value with a value of the branch condition and generating a successful branch condition indication if the branch condition value is equal to the calculated index value;
• means for repeating operation of the modifying and evaluating means as long as the branch condition is fulfilled, and otherwise addressing and executing in said first processor a next instruction outside of the loop;
• means for comparing during each operation of the modifying and evaluating means, said branch instruction address stored in said second register means and the modified current instruction address to determine when during execution of the loop said branch instruction address has been reached;
• and
• means for replacing said modified current instruction address in said modifying means by said branch target address if the comparing means indicates a match and the operation of the modifying and evaluating means resulted in a branch condition, thereby suppressing execution of said branch instruction in the first processor until the branch condition ceases to be fulfilled.

Method for executing a program comprising instructions in a loop, said method comprising the steps of:

• in a first processor, performing a first execution of said loop instructions and concurrently in a second processor, processing a loop end condition;
• storing a branch target address of a first instruction in the loop and storing an address of a branch instruction;
• performing a subsequent execution of said loop instructions in said first processor, and while avoiding execution of said branch instruction, evaluating instead a branch condition in said first processor and, if the branch condition is fulfilled, detecting an end of said loop by comparing an effective address of a next instruction to be executed with the stored address of the branch instruction;
• passing the stored branch target address to said second processor for re-executing said instructions;
• and
• executing said loop instructions until the branch condition is no longer fulfilled, and then addressing a next instruction outside of said loop;
• and wherein
• said evaluating step comprises the steps of calculating an index value for the branch instruction, comparing the calculated index value with a branch condition value, and setting a successful branch indicator latch if the branch condition value is equal to the calculated index value;
• and
• said calculating step comprises the step of retrieving a previous value of the index value and adding to said previous value a value given in the branch instruction.