Independent computer storage addressing in input/output transfers

A method of transferring data in a direct memory access (DMA) operation or on an input/output (I/O) channel or other interconnection medium between a requestor and responder device, comprising the steps of:

• a) initially communicating at least one logical token value directly between a requestor and responder, said requestor and said responder requiring no knowledge of the other's storage architecture or data organization, said at least one logical token value identifying a particular data transfer operation which may subsequently occur between said requestor and responder;
• b) the requestor initially creating a tag identifier uniquely designating one of said at least one logical token value, and an offset value;
• and the requestor communicating said tag identifier and the uniquely designated logical token value and the offset value directly to the responder;
• and the responder storing the tag identifier to associate it with said uniquely designated logical token value and said offset value;
• c) the requestor and responder each independently designating a respective first local memory address to associate with each of said at least one logical token value;
• d) the requestor transmitting said tag identifier directly to the responder at the start of a DMA transfer operation which is part of said data transfer operation;
• e) the responder utilizing the tag identifier to select said uniquely designated logical token value and said offset value and transforming said logical token value and said offset value into a responder second local memory address;
• and
• f) the requestor and responder directly transferring data between the requestor and responder, said data being transferred to/from respective local memory addresses designated by said at least one logical token value and said offset value, the first transfer being directly between the requestor first local memory address and the responder second local memory address.

A method of direct memory addressing between a requestor device and a responder device, comprising;

• the requestor device creating a token value, a tag identifier, an offset value and a length identifier and directly communicating the same to said responder device;
• said requestor device and said responder device requiring no knowledge of the other's storage architecture or data organization, said responder device transforming said token value and offset value into a first local responder memory address;
• said responder device decrementing said length identifier into a final local responder memory address;
• said responder device recording said token value, said offset value, and said length identifier at a responder recording memory location;
• and said responder device using said tag identifier in subsequent transfers of data directly between said requestor device and said responder device to identify said responder recording memory location.

A method of transferring data between respective memory addresses in a requesting device and a responding device wherein the requesting and responding devices each have memory addressing models unknown to the other, comprising the steps of:

• a) communicating a logical token value directly between said requesting device and said responding device, said requesting device using said logical token value to identify a first requesting device memory address, and said responding device using said logical token value to identify a first responding device memory address;
• b) said requesting device initiating the transfer of data directly between said requesting device and said responding device by transmitting said logical token value and an offset value directly to said responding device;
• c) said responding device, in response thereto, identifying a second responding device memory address corresponding to said first responding device memory address incremented by said offset value;
• and
• d) transferring data directly between said second responding device memory address and said first requesting device memory address.

An apparatus for completing a data transfer operation between a requesting device and a responding device wherein each of the requesting device and responding device has a memory address model unknown to the other device, and each of the requesting device and responding device has local memory addresses for such data transfer but such local memory addresses are respectively unknown to the other device, comprising:

• a) means for communicating directly between the requesting device and the responding device a logical token value representative of the data to be transferred;
• b) means for the requesting device to identify a tag value representative of the identity of the data transfer operation;
• c) means for the requesting device to communicate directly to the responding device, at the start of a data transfer operation, the logical token value and the tag value;
• d) means for the responding device to initiate said data transfer operation with reference to its local memory addresses corresponding to said logical token value, and means for said responding device to directly transmit said data in one or more sequential segments, each segment being accompanied by said tag value, to said requesting device;
• and
• e) means for said requesting device to read said tag value and thereby to associate each segment with one or more requesting device local memory addresses.

An apparatus for performing a plurality of direct memory addressing operations between a requestor device and responder device wherein each device has a memory address model unknown to the other device, and each device has respective local memory addresses for data transfer in said direct memory addressing operations, comprising:

• a) means for designating a plurality of logical tokens and offset values, one token and one offset value associated with each respective one of said plurality of direct memory addressing operations, said logical tokens and said offset values recognizable by said requestor device as an indicia to identify one of a plurality of local memory addresses in said requestor device for performing said plurality of direct memory addressing operations;
• b) means in said requestor device for transmitting said each of said logical tokens and offset values directly to said responder device in a first sequence on a fiber-optic interconnection medium, and means in said responder device for selecting a plurality of local memory addresses corresponding to each respective one of said logical tokens and offset values;
• c) means for initiating one of said direct memory addressing operations in said requestor device and means for designating a tag value as an indicia to identify each respective one of said direct memory addressing operations, including means for communicating said tag value directly from said requestor device to said responder device on said fiber-optic interconnection medium;
• d) means in said responder device for performing each of said direct memory addressing operation in unsynchronized sequential segments in a second sequence different from said first sequence, each segment being transmitted directly from said responder device to said requestor device with said tag value, from each respective one of said local memory addresses identified by each respective one of said logical tokens and offset values;
• and
• e) means in said requestor device for identifying each respective one of said direct memory addressing operations by said transmitted tag value, and means in said requestor device for performing each respective one of said direct memory addressing operations to each respective one of said local memory addresses identified by each respective one of said logical tokens and offset values.